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bpf, x32: Fix bug for BPF_ALU64 | BPF_NEG
The current implementation has two errors: 1: The second xor instruction will clear carry flag which is necessary for following sbb instruction. 2: The select coding for sbb instruction is wrong, the coding is "sbb dreg_hi,ecx", but what we need is "sbb ecx,dreg_hi". This patch rewrites the implementation and fixes the errors. This patch fixes below errors reported by bpf/test_verifier in x32 platform when the jit is enabled: " 0: (b4) w1 = 4 1: (b4) w2 = 4 2: (1f) r2 -= r1 3: (4f) r2 |= r1 4: (87) r2 = -r2 5: (c7) r2 s>>= 63 6: (5f) r1 &= r2 7: (bf) r0 = r1 8: (95) exit processed 9 insns (limit 131072), stack depth 0 0: (b4) w1 = 4 1: (b4) w2 = 4 2: (1f) r2 -= r1 3: (4f) r2 |= r1 4: (87) r2 = -r2 5: (c7) r2 s>>= 63 6: (5f) r1 &= r2 7: (bf) r0 = r1 8: (95) exit processed 9 insns (limit 131072), stack depth 0 ...... Summary: 1189 PASSED, 125 SKIPPED, 15 FAILED " Signed-off-by: Wang YanQing <udknight@gmail.com> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
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@ -700,19 +700,12 @@ static inline void emit_ia32_neg64(const u8 dst[], bool dstk, u8 **pprog)
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STACK_VAR(dst_hi));
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}
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/* xor ecx,ecx */
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EMIT2(0x31, add_2reg(0xC0, IA32_ECX, IA32_ECX));
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/* sub dreg_lo,ecx */
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EMIT2(0x2B, add_2reg(0xC0, dreg_lo, IA32_ECX));
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/* mov dreg_lo,ecx */
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EMIT2(0x89, add_2reg(0xC0, dreg_lo, IA32_ECX));
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/* xor ecx,ecx */
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EMIT2(0x31, add_2reg(0xC0, IA32_ECX, IA32_ECX));
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/* sbb dreg_hi,ecx */
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EMIT2(0x19, add_2reg(0xC0, dreg_hi, IA32_ECX));
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/* mov dreg_hi,ecx */
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EMIT2(0x89, add_2reg(0xC0, dreg_hi, IA32_ECX));
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/* neg dreg_lo */
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EMIT2(0xF7, add_1reg(0xD8, dreg_lo));
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/* adc dreg_hi,0x0 */
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EMIT3(0x83, add_1reg(0xD0, dreg_hi), 0x00);
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/* neg dreg_hi */
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EMIT2(0xF7, add_1reg(0xD8, dreg_hi));
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if (dstk) {
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/* mov dword ptr [ebp+off],dreg_lo */
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