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spi: fsl-lpspi: read lpspi tx/rx fifo size in probe()
The lpspi tx/rx fifo size is a read only parameter resides lpspi Parameter Register. It's better to read lpspi tx/rx fifo size in probe(). Signed-off-by: Gao Pan <pandy.gao@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -236,15 +236,9 @@ static void fsl_lpspi_set_cmd(struct fsl_lpspi_data *fsl_lpspi,
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static void fsl_lpspi_set_watermark(struct fsl_lpspi_data *fsl_lpspi)
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{
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u8 txwatermark, rxwatermark;
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u32 temp;
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temp = readl(fsl_lpspi->base + IMX7ULP_PARAM);
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fsl_lpspi->txfifosize = 1 << (temp & 0x0f);
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fsl_lpspi->rxfifosize = 1 << ((temp >> 8) & 0x0f);
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rxwatermark = fsl_lpspi->txfifosize >> 1;
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txwatermark = fsl_lpspi->rxfifosize >> 1;
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temp = txwatermark | rxwatermark << 16;
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temp = fsl_lpspi->txfifosize >> 1 | (fsl_lpspi->rxfifosize >> 1) << 16;
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writel(temp, fsl_lpspi->base + IMX7ULP_FCR);
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@ -427,6 +421,7 @@ static int fsl_lpspi_probe(struct platform_device *pdev)
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struct spi_master *master;
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struct resource *res;
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int ret, irq;
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u32 temp;
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master = spi_alloc_master(&pdev->dev, sizeof(struct fsl_lpspi_data));
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if (!master)
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@ -476,6 +471,18 @@ static int fsl_lpspi_probe(struct platform_device *pdev)
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goto out_master_put;
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}
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ret = clk_prepare_enable(fsl_lpspi->clk);
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if (ret) {
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dev_err(&pdev->dev, "can't enable lpspi clock, ret=%d\n", ret);
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goto out_master_put;
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}
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temp = readl(fsl_lpspi->base + IMX7ULP_PARAM);
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fsl_lpspi->txfifosize = 1 << (temp & 0x0f);
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fsl_lpspi->rxfifosize = 1 << ((temp >> 8) & 0x0f);
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clk_disable_unprepare(fsl_lpspi->clk);
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ret = devm_spi_register_master(&pdev->dev, master);
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if (ret < 0) {
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dev_err(&pdev->dev, "spi_register_master error.\n");
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