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drm/amdgpu: extend PSP FW loading support to 8 SDMA instances

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Arcturus has 8 instances of SDMA.  Update host to PSP interface
to handle it.

Signed-off-by: John Clements <john.clements@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
John Clements 2019-08-01 17:59:55 +08:00 committed by Alex Deucher
parent 8fda90e821
commit b86f8d8b2b
3 changed files with 41 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

27
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
View File

@ -833,7 +833,6 @@ static int psp_hw_start(struct psp_context *psp)
"XGMI: Failed to initialize XGMI session\n"); "XGMI: Failed to initialize XGMI session\n");
} }
if (psp->adev->psp.ta_fw) { if (psp->adev->psp.ta_fw) {
ret = psp_ras_initialize(psp); ret = psp_ras_initialize(psp);
if (ret) if (ret)
@ -854,6 +853,24 @@ static int psp_get_fw_type(struct amdgpu_firmware_info *ucode,
case AMDGPU_UCODE_ID_SDMA1: case AMDGPU_UCODE_ID_SDMA1:
*type = GFX_FW_TYPE_SDMA1; *type = GFX_FW_TYPE_SDMA1;
break; break;
case AMDGPU_UCODE_ID_SDMA2:
*type = GFX_FW_TYPE_SDMA2;
break;
case AMDGPU_UCODE_ID_SDMA3:
*type = GFX_FW_TYPE_SDMA3;
break;
case AMDGPU_UCODE_ID_SDMA4:
*type = GFX_FW_TYPE_SDMA4;
break;
case AMDGPU_UCODE_ID_SDMA5:
*type = GFX_FW_TYPE_SDMA5;
break;
case AMDGPU_UCODE_ID_SDMA6:
*type = GFX_FW_TYPE_SDMA6;
break;
case AMDGPU_UCODE_ID_SDMA7:
*type = GFX_FW_TYPE_SDMA7;
break;
case AMDGPU_UCODE_ID_CP_CE: case AMDGPU_UCODE_ID_CP_CE:
*type = GFX_FW_TYPE_CP_CE; *type = GFX_FW_TYPE_CP_CE;
break; break;
@ -982,12 +999,20 @@ static int psp_np_fw_load(struct psp_context *psp)
if (ucode->ucode_id == AMDGPU_UCODE_ID_SMC && if (ucode->ucode_id == AMDGPU_UCODE_ID_SMC &&
(psp_smu_reload_quirk(psp) || psp->autoload_supported)) (psp_smu_reload_quirk(psp) || psp->autoload_supported))
continue; continue;
if (amdgpu_sriov_vf(adev) && if (amdgpu_sriov_vf(adev) &&
(ucode->ucode_id == AMDGPU_UCODE_ID_SDMA0 (ucode->ucode_id == AMDGPU_UCODE_ID_SDMA0
|| ucode->ucode_id == AMDGPU_UCODE_ID_SDMA1 || ucode->ucode_id == AMDGPU_UCODE_ID_SDMA1
|| ucode->ucode_id == AMDGPU_UCODE_ID_SDMA2
|| ucode->ucode_id == AMDGPU_UCODE_ID_SDMA3
|| ucode->ucode_id == AMDGPU_UCODE_ID_SDMA4
|| ucode->ucode_id == AMDGPU_UCODE_ID_SDMA5
|| ucode->ucode_id == AMDGPU_UCODE_ID_SDMA6
|| ucode->ucode_id == AMDGPU_UCODE_ID_SDMA7
|| ucode->ucode_id == AMDGPU_UCODE_ID_RLC_G)) || ucode->ucode_id == AMDGPU_UCODE_ID_RLC_G))
/*skip ucode loading in SRIOV VF */ /*skip ucode loading in SRIOV VF */
continue; continue;
if (psp->autoload_supported && if (psp->autoload_supported &&
(ucode->ucode_id == AMDGPU_UCODE_ID_CP_MEC1_JT || (ucode->ucode_id == AMDGPU_UCODE_ID_CP_MEC1_JT ||
ucode->ucode_id == AMDGPU_UCODE_ID_CP_MEC2_JT)) ucode->ucode_id == AMDGPU_UCODE_ID_CP_MEC2_JT))

6
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
View File

@ -271,6 +271,12 @@ union amdgpu_firmware_header {
enum AMDGPU_UCODE_ID { enum AMDGPU_UCODE_ID {
AMDGPU_UCODE_ID_SDMA0 = 0, AMDGPU_UCODE_ID_SDMA0 = 0,
AMDGPU_UCODE_ID_SDMA1, AMDGPU_UCODE_ID_SDMA1,
AMDGPU_UCODE_ID_SDMA2,
AMDGPU_UCODE_ID_SDMA3,
AMDGPU_UCODE_ID_SDMA4,
AMDGPU_UCODE_ID_SDMA5,
AMDGPU_UCODE_ID_SDMA6,
AMDGPU_UCODE_ID_SDMA7,
AMDGPU_UCODE_ID_CP_CE, AMDGPU_UCODE_ID_CP_CE,
AMDGPU_UCODE_ID_CP_PFP, AMDGPU_UCODE_ID_CP_PFP,
AMDGPU_UCODE_ID_CP_ME, AMDGPU_UCODE_ID_CP_ME,

11
drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h
View File

@ -233,8 +233,15 @@ enum psp_gfx_fw_type {
GFX_FW_TYPE_RLCP_CAM = 46, /* RLCP CAM NV */ GFX_FW_TYPE_RLCP_CAM = 46, /* RLCP CAM NV */
GFX_FW_TYPE_RLC_SPP_CAM_EXT = 47, /* RLC SPP CAM EXT NV */ GFX_FW_TYPE_RLC_SPP_CAM_EXT = 47, /* RLC SPP CAM EXT NV */
GFX_FW_TYPE_RLX6_DRAM_BOOT = 48, /* RLX6 DRAM BOOT NV */ GFX_FW_TYPE_RLX6_DRAM_BOOT = 48, /* RLX6 DRAM BOOT NV */
GFX_FW_TYPE_VCN0_RAM = 49, /* VCN_RAM NV */ GFX_FW_TYPE_VCN0_RAM = 49, /* VCN_RAM NV + RN */
GFX_FW_TYPE_VCN1_RAM = 50, /* VCN_RAM NV */ GFX_FW_TYPE_VCN1_RAM = 50, /* VCN_RAM NV + RN */
GFX_FW_TYPE_DMUB = 51, /* DMUB RN */
GFX_FW_TYPE_SDMA2 = 52, /* SDMA2 MI */
GFX_FW_TYPE_SDMA3 = 53, /* SDMA3 MI */
GFX_FW_TYPE_SDMA4 = 54, /* SDMA4 MI */
GFX_FW_TYPE_SDMA5 = 55, /* SDMA5 MI */
GFX_FW_TYPE_SDMA6 = 56, /* SDMA6 MI */
GFX_FW_TYPE_SDMA7 = 57, /* SDMA7 MI */
GFX_FW_TYPE_MAX GFX_FW_TYPE_MAX
}; };