mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-13 03:26:54 +07:00
Merge branch 'qed-fixes'
Yuval Mintz says: ==================== qed*: Bug fixes This series contain several small fixes, most of which deal with either 100g support, sriov or bandwidth configurations. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
commit
b7e7ad611e
@ -155,12 +155,14 @@ void qed_resc_free(struct qed_dev *cdev)
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}
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}
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}
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}
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static int qed_init_qm_info(struct qed_hwfn *p_hwfn)
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static int qed_init_qm_info(struct qed_hwfn *p_hwfn, bool b_sleepable)
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{
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{
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u8 num_vports, vf_offset = 0, i, vport_id, num_ports, curr_queue = 0;
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u8 num_vports, vf_offset = 0, i, vport_id, num_ports, curr_queue = 0;
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struct qed_qm_info *qm_info = &p_hwfn->qm_info;
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struct qed_qm_info *qm_info = &p_hwfn->qm_info;
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struct init_qm_port_params *p_qm_port;
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struct init_qm_port_params *p_qm_port;
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u16 num_pqs, multi_cos_tcs = 1;
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u16 num_pqs, multi_cos_tcs = 1;
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u8 pf_wfq = qm_info->pf_wfq;
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u32 pf_rl = qm_info->pf_rl;
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u16 num_vfs = 0;
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u16 num_vfs = 0;
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#ifdef CONFIG_QED_SRIOV
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#ifdef CONFIG_QED_SRIOV
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@ -182,23 +184,28 @@ static int qed_init_qm_info(struct qed_hwfn *p_hwfn)
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/* PQs will be arranged as follows: First per-TC PQ then pure-LB quete.
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/* PQs will be arranged as follows: First per-TC PQ then pure-LB quete.
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*/
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*/
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qm_info->qm_pq_params = kzalloc(sizeof(*qm_info->qm_pq_params) *
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qm_info->qm_pq_params = kcalloc(num_pqs,
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num_pqs, GFP_KERNEL);
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sizeof(struct init_qm_pq_params),
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b_sleepable ? GFP_KERNEL : GFP_ATOMIC);
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if (!qm_info->qm_pq_params)
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if (!qm_info->qm_pq_params)
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goto alloc_err;
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goto alloc_err;
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qm_info->qm_vport_params = kzalloc(sizeof(*qm_info->qm_vport_params) *
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qm_info->qm_vport_params = kcalloc(num_vports,
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num_vports, GFP_KERNEL);
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sizeof(struct init_qm_vport_params),
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b_sleepable ? GFP_KERNEL
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: GFP_ATOMIC);
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if (!qm_info->qm_vport_params)
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if (!qm_info->qm_vport_params)
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goto alloc_err;
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goto alloc_err;
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qm_info->qm_port_params = kzalloc(sizeof(*qm_info->qm_port_params) *
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qm_info->qm_port_params = kcalloc(MAX_NUM_PORTS,
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MAX_NUM_PORTS, GFP_KERNEL);
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sizeof(struct init_qm_port_params),
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b_sleepable ? GFP_KERNEL
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: GFP_ATOMIC);
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if (!qm_info->qm_port_params)
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if (!qm_info->qm_port_params)
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goto alloc_err;
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goto alloc_err;
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qm_info->wfq_data = kcalloc(num_vports, sizeof(*qm_info->wfq_data),
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qm_info->wfq_data = kcalloc(num_vports, sizeof(struct qed_wfq_data),
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GFP_KERNEL);
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b_sleepable ? GFP_KERNEL : GFP_ATOMIC);
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if (!qm_info->wfq_data)
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if (!qm_info->wfq_data)
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goto alloc_err;
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goto alloc_err;
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@ -264,10 +271,10 @@ static int qed_init_qm_info(struct qed_hwfn *p_hwfn)
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for (i = 0; i < qm_info->num_vports; i++)
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for (i = 0; i < qm_info->num_vports; i++)
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qm_info->qm_vport_params[i].vport_wfq = 1;
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qm_info->qm_vport_params[i].vport_wfq = 1;
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qm_info->pf_wfq = 0;
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qm_info->pf_rl = 0;
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qm_info->vport_rl_en = 1;
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qm_info->vport_rl_en = 1;
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qm_info->vport_wfq_en = 1;
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qm_info->vport_wfq_en = 1;
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qm_info->pf_rl = pf_rl;
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qm_info->pf_wfq = pf_wfq;
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return 0;
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return 0;
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@ -299,7 +306,7 @@ int qed_qm_reconf(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
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qed_qm_info_free(p_hwfn);
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qed_qm_info_free(p_hwfn);
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/* initialize qed's qm data structure */
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/* initialize qed's qm data structure */
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rc = qed_init_qm_info(p_hwfn);
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rc = qed_init_qm_info(p_hwfn, false);
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if (rc)
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if (rc)
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return rc;
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return rc;
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@ -388,7 +395,7 @@ int qed_resc_alloc(struct qed_dev *cdev)
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goto alloc_err;
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goto alloc_err;
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/* Prepare and process QM requirements */
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/* Prepare and process QM requirements */
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rc = qed_init_qm_info(p_hwfn);
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rc = qed_init_qm_info(p_hwfn, true);
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if (rc)
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if (rc)
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goto alloc_err;
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goto alloc_err;
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@ -581,7 +588,14 @@ static void qed_calc_hw_mode(struct qed_hwfn *p_hwfn)
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hw_mode |= 1 << MODE_ASIC;
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hw_mode |= 1 << MODE_ASIC;
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if (p_hwfn->cdev->num_hwfns > 1)
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hw_mode |= 1 << MODE_100G;
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p_hwfn->hw_info.hw_mode = hw_mode;
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p_hwfn->hw_info.hw_mode = hw_mode;
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DP_VERBOSE(p_hwfn, (NETIF_MSG_PROBE | NETIF_MSG_IFUP),
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"Configuring function for hw_mode: 0x%08x\n",
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p_hwfn->hw_info.hw_mode);
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}
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}
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/* Init run time data for all PFs on an engine. */
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/* Init run time data for all PFs on an engine. */
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@ -821,6 +835,11 @@ int qed_hw_init(struct qed_dev *cdev,
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u32 load_code, param;
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u32 load_code, param;
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int rc, mfw_rc, i;
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int rc, mfw_rc, i;
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if ((int_mode == QED_INT_MODE_MSI) && (cdev->num_hwfns > 1)) {
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DP_NOTICE(cdev, "MSI mode is not supported for CMT devices\n");
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return -EINVAL;
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}
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if (IS_PF(cdev)) {
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if (IS_PF(cdev)) {
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rc = qed_init_fw_data(cdev, bin_fw_data);
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rc = qed_init_fw_data(cdev, bin_fw_data);
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if (rc != 0)
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if (rc != 0)
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@ -2086,6 +2105,13 @@ void qed_configure_vp_wfq_on_link_change(struct qed_dev *cdev, u32 min_pf_rate)
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{
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{
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int i;
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int i;
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if (cdev->num_hwfns > 1) {
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DP_VERBOSE(cdev,
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NETIF_MSG_LINK,
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"WFQ configuration is not supported for this device\n");
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return;
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}
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for_each_hwfn(cdev, i) {
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for_each_hwfn(cdev, i) {
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struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
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struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
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@ -413,15 +413,17 @@ static int qed_set_int_mode(struct qed_dev *cdev, bool force_mode)
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/* Fallthrough */
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/* Fallthrough */
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case QED_INT_MODE_MSI:
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case QED_INT_MODE_MSI:
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rc = pci_enable_msi(cdev->pdev);
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if (cdev->num_hwfns == 1) {
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if (!rc) {
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rc = pci_enable_msi(cdev->pdev);
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int_params->out.int_mode = QED_INT_MODE_MSI;
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if (!rc) {
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goto out;
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int_params->out.int_mode = QED_INT_MODE_MSI;
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}
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goto out;
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}
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DP_NOTICE(cdev, "Failed to enable MSI\n");
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DP_NOTICE(cdev, "Failed to enable MSI\n");
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if (force_mode)
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if (force_mode)
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goto out;
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goto out;
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}
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/* Fallthrough */
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/* Fallthrough */
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case QED_INT_MODE_INTA:
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case QED_INT_MODE_INTA:
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@ -230,7 +230,10 @@ static int qede_get_sset_count(struct net_device *dev, int stringset)
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case ETH_SS_PRIV_FLAGS:
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case ETH_SS_PRIV_FLAGS:
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return QEDE_PRI_FLAG_LEN;
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return QEDE_PRI_FLAG_LEN;
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case ETH_SS_TEST:
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case ETH_SS_TEST:
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return QEDE_ETHTOOL_TEST_MAX;
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if (!IS_VF(edev))
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return QEDE_ETHTOOL_TEST_MAX;
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else
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return 0;
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default:
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default:
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DP_VERBOSE(edev, QED_MSG_DEBUG,
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DP_VERBOSE(edev, QED_MSG_DEBUG,
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"Unsupported stringset 0x%08x\n", stringset);
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"Unsupported stringset 0x%08x\n", stringset);
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@ -1824,7 +1824,7 @@ static int qede_set_vf_rate(struct net_device *dev, int vfidx,
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{
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{
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struct qede_dev *edev = netdev_priv(dev);
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struct qede_dev *edev = netdev_priv(dev);
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return edev->ops->iov->set_rate(edev->cdev, vfidx, max_tx_rate,
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return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate,
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max_tx_rate);
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max_tx_rate);
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}
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}
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@ -2091,6 +2091,29 @@ static void qede_vlan_mark_nonconfigured(struct qede_dev *edev)
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edev->accept_any_vlan = false;
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edev->accept_any_vlan = false;
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}
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}
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int qede_set_features(struct net_device *dev, netdev_features_t features)
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{
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struct qede_dev *edev = netdev_priv(dev);
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netdev_features_t changes = features ^ dev->features;
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bool need_reload = false;
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/* No action needed if hardware GRO is disabled during driver load */
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if (changes & NETIF_F_GRO) {
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if (dev->features & NETIF_F_GRO)
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need_reload = !edev->gro_disable;
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else
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need_reload = edev->gro_disable;
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}
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if (need_reload && netif_running(edev->ndev)) {
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dev->features = features;
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qede_reload(edev, NULL, NULL);
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return 1;
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}
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return 0;
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}
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#ifdef CONFIG_QEDE_VXLAN
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#ifdef CONFIG_QEDE_VXLAN
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static void qede_add_vxlan_port(struct net_device *dev,
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static void qede_add_vxlan_port(struct net_device *dev,
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sa_family_t sa_family, __be16 port)
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sa_family_t sa_family, __be16 port)
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@ -2175,6 +2198,7 @@ static const struct net_device_ops qede_netdev_ops = {
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#endif
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#endif
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.ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
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.ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
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.ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
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.ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
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.ndo_set_features = qede_set_features,
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.ndo_get_stats64 = qede_get_stats64,
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.ndo_get_stats64 = qede_get_stats64,
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#ifdef CONFIG_QED_SRIOV
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#ifdef CONFIG_QED_SRIOV
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.ndo_set_vf_link_state = qede_set_vf_link_state,
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.ndo_set_vf_link_state = qede_set_vf_link_state,
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