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ARM: dts: stih410: Enable USB2.0 and related PHY nodes at board level
A board might not expose the USB2.0 ports, so disable them by default in SoC file, and enable them in b2120 board. Acked-by: Patrice Chotard <patrice.chotard@st.com> Acked-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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@ -35,5 +35,29 @@ mmc0: sdhci@09060000 {
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sd-uhs-sdr104;
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sd-uhs-ddr50;
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};
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usb2_picophy1: phy2 {
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status = "okay";
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};
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usb2_picophy2: phy3 {
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status = "okay";
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};
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ohci0: usb@9a03c00 {
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status = "okay";
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};
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ehci0: usb@9a03e00 {
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status = "okay";
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};
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ohci1: usb@9a83c00 {
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status = "okay";
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};
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ehci1: usb@9a83e00 {
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status = "okay";
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};
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};
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};
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@ -22,6 +22,8 @@ usb2_picophy1: phy2 {
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resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
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<&picophyreset STIH407_PICOPHY0_RESET>;
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reset-names = "global", "port";
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status = "disabled";
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};
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usb2_picophy2: phy3 {
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@ -31,6 +33,8 @@ usb2_picophy2: phy3 {
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resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
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<&picophyreset STIH407_PICOPHY1_RESET>;
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reset-names = "global", "port";
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status = "disabled";
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};
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ohci0: usb@9a03c00 {
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@ -43,6 +47,8 @@ ohci0: usb@9a03c00 {
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reset-names = "power", "softreset";
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phys = <&usb2_picophy1>;
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phy-names = "usb";
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status = "disabled";
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};
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ehci0: usb@9a03e00 {
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@ -57,6 +63,8 @@ ehci0: usb@9a03e00 {
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reset-names = "power", "softreset";
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phys = <&usb2_picophy1>;
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phy-names = "usb";
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status = "disabled";
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};
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ohci1: usb@9a83c00 {
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@ -69,6 +77,8 @@ ohci1: usb@9a83c00 {
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reset-names = "power", "softreset";
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phys = <&usb2_picophy2>;
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phy-names = "usb";
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status = "disabled";
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};
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ehci1: usb@9a83e00 {
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@ -83,6 +93,8 @@ ehci1: usb@9a83e00 {
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reset-names = "power", "softreset";
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phys = <&usb2_picophy2>;
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phy-names = "usb";
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status = "disabled";
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};
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sti-display-subsystem {
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