AuxXxilium/linux_dsm_epyc7002
1
0
Fork 0
mirror of https://github.com/AuxXxilium/linux_dsm_epyc7002.git synced 2024-12-18 18:57:47 +07:00
Code Issues Actions Packages Projects Releases Wiki Activity

clk: rockchip: add some critical clocks for rv1108 SoC

Browse Source 
the bus/periph/nclk_ddrupctl/pclk_ddrmon/pclk_acodecphy/pclk_pmu
no driver to handle them,
Chip design requirements for these clock to always on.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Elaine Zhang 2017-08-08 15:19:33 +08:00 committed by Heiko Stuebner
parent a52394e9a0
commit b75f38451a
1 changed files with 7 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
drivers/clk/rockchip/clk-rv1108.c
View File

@ -776,10 +776,16 @@ static struct rockchip_clk_branch rv1108_clk_branches[] __initdata = {
static const char *const rv1108_critical_clocks[] __initconst = {
"aclk_core",
"aclk_bus_src_gpll",
"aclk_bus",
"hclk_bus",
"pclk_bus",
"aclk_periph",
"hclk_periph",
"pclk_periph",
"nclk_ddrupctl",
"pclk_ddrmon",
"pclk_acodecphy",
"pclk_pmu",
};
static void __init rv1108_clk_init(struct device_node *np)