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net/mlx5e: Add counter for MPWQE filler strides
Add ethtool counter to indicate the number of strides consumed by filler CQEs. Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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@ -1263,7 +1263,10 @@ void mlx5e_handle_rx_cqe_mpwrq(struct mlx5e_rq *rq, struct mlx5_cqe64 *cqe)
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}
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if (unlikely(mpwrq_is_filler_cqe(cqe))) {
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rq->stats->mpwqe_filler++;
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struct mlx5e_rq_stats *stats = rq->stats;
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stats->mpwqe_filler_cqes++;
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stats->mpwqe_filler_strides += cstrides;
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goto mpwrq_cqe_out;
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}
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@ -73,7 +73,8 @@ static const struct counter_desc sw_stats_desc[] = {
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{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_udp_seg_rem) },
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{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_cqe_err) },
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{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_wqe_err) },
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{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_mpwqe_filler) },
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{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_mpwqe_filler_cqes) },
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{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_mpwqe_filler_strides) },
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{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_buff_alloc_err) },
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{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cqe_compress_blks) },
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{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cqe_compress_pkts) },
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@ -144,7 +145,8 @@ void mlx5e_grp_sw_update_stats(struct mlx5e_priv *priv)
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s->rx_xdp_tx_cqe += rq_stats->xdp_tx_cqe;
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s->rx_xdp_tx_full += rq_stats->xdp_tx_full;
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s->rx_wqe_err += rq_stats->wqe_err;
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s->rx_mpwqe_filler += rq_stats->mpwqe_filler;
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s->rx_mpwqe_filler_cqes += rq_stats->mpwqe_filler_cqes;
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s->rx_mpwqe_filler_strides += rq_stats->mpwqe_filler_strides;
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s->rx_buff_alloc_err += rq_stats->buff_alloc_err;
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s->rx_cqe_compress_blks += rq_stats->cqe_compress_blks;
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s->rx_cqe_compress_pkts += rq_stats->cqe_compress_pkts;
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@ -1129,7 +1131,8 @@ static const struct counter_desc rq_stats_desc[] = {
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{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, lro_bytes) },
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{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, removed_vlan_packets) },
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{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, wqe_err) },
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{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, mpwqe_filler) },
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{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, mpwqe_filler_cqes) },
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{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, mpwqe_filler_strides) },
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{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, buff_alloc_err) },
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{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cqe_compress_blks) },
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{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cqe_compress_pkts) },
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@ -84,7 +84,8 @@ struct mlx5e_sw_stats {
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u64 tx_udp_seg_rem;
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u64 tx_cqe_err;
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u64 rx_wqe_err;
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u64 rx_mpwqe_filler;
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u64 rx_mpwqe_filler_cqes;
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u64 rx_mpwqe_filler_strides;
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u64 rx_buff_alloc_err;
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u64 rx_cqe_compress_blks;
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u64 rx_cqe_compress_pkts;
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@ -180,7 +181,8 @@ struct mlx5e_rq_stats {
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u64 xdp_tx_cqe;
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u64 xdp_tx_full;
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u64 wqe_err;
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u64 mpwqe_filler;
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u64 mpwqe_filler_cqes;
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u64 mpwqe_filler_strides;
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u64 buff_alloc_err;
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u64 cqe_compress_blks;
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u64 cqe_compress_pkts;
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