mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-18 16:46:45 +07:00
Pin control fixes for v4.9 first round:
- A bunch of barnsjukdomar/kinderkrankheiten/maladie infantile in the Aspeed driver. (Why doesn't English have a word for this?) - Fix a lockdep bug on the Intel BayTrail. - Fix a few special laptop issues on the Intel pin controller solving suspend issues. -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJYB3EtAAoJEEEQszewGV1zIKsQAJpiObaZ+57eqSxBERC3KXo+ PObGQ+fEdIhanDcBRNqfJ1wZBAce9e0iKCMgeG0ScS/yo2u2nGUcDpmu4j3flerZ 5DG32ymT2QoLnNHHtJLugx21T8MKvky7BrUOk/6DeypIMQH0cP+HEz7XfwKGqMaV DOHLNh3ohqvyHwip9sW/XqEz5/NZXnMvvlGVBdmplFgd4ytjiQ4dc0Je3A/PyXyy jLo1QIENsYgDvAXWiihFY/k49aumzhHvxguACPtN6Cdveq+QpTQ8kDYrZblol91o LwIwKv02GUNBRYdyqgad0ckgfDhttrXhu3ZdMmvArTpcdJwdIHY5CpBbij5hJ4wi UrsgLWHXVw7m3MoRIKUw8AtA+ip9DWi6la4rOOKZzjquJi7NSfvkoxBDOfQbS4kD pHZhKekEHc3ZEZ2GYC5Uo/H4Sbt/FWRe9tNldFdBLKcsK48ps+5v7bsbJIGE6e3D oGkuIlO57G26DnkXwaaDFzWJ6mcMeW281tUuECSuSDPSPGDIJEjIv0wc/u6pokjP QXH6pn2EbpQgUhzEguTRcfRED/AV1Jb57uxLv2uzDuB0n/lRtoYS0nxtHyzvSfZQ xhZtuFs6Az9zJxkl1wzUGBaZCnysSGsj8vprWUS5jqrauUXax5Fqn3UefXp0Ypg2 a6Twvn+Ygt+qW2PXUA6L =ODoY -----END PGP SIGNATURE----- Merge tag 'pinctrl-v4.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull first round of pin control fixes from Linus Walleij: - a bunch of barnsjukdomar/kinderkrankheiten/maladie infantile in the Aspeed driver. (Why doesn't English have a word for this?) [ Maybe "teething problems" is the closest English idiom? - Linus T ] - fix a lockdep bug on the Intel BayTrail. - fix a few special laptop issues on the Intel pin controller solving suspend issues. * tag 'pinctrl-v4.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: pinctrl: intel: Only restore pins that are used by the driver pinctrl: baytrail: Fix lockdep pinctrl: aspeed-g5: Fix pin association of SPI1 function pinctrl: aspeed-g5: Fix GPIOE1 typo pinctrl: aspeed-g5: Fix names of GPID2 pins pinctrl: aspeed: "Not enabled" is a significant mux state
This commit is contained in:
commit
b6ffb11e4e
@ -43,7 +43,9 @@ aspeed,ast2500-pinctrl, aspeed,g5-pinctrl:
|
||||
|
||||
GPID0 GPID2 GPIE0 I2C10 I2C11 I2C12 I2C13 I2C14 I2C3 I2C4 I2C5 I2C6 I2C7 I2C8
|
||||
I2C9 MAC1LINK MDIO1 MDIO2 OSCCLK PEWAKE PWM0 PWM1 PWM2 PWM3 PWM4 PWM5 PWM6 PWM7
|
||||
RGMII1 RGMII2 RMII1 RMII2 SD1 SPI1 TIMER4 TIMER5 TIMER6 TIMER7 TIMER8
|
||||
RGMII1 RGMII2 RMII1 RMII2 SD1 SPI1 SPI1DEBUG SPI1PASSTHRU TIMER4 TIMER5 TIMER6
|
||||
TIMER7 TIMER8 VGABIOSROM
|
||||
|
||||
|
||||
Examples:
|
||||
|
||||
|
@ -151,21 +151,21 @@ FUNC_GROUP_DECL(GPID0, F19, E21);
|
||||
|
||||
#define GPID2_DESC SIG_DESC_SET(SCU8C, 9)
|
||||
|
||||
#define D20 26
|
||||
#define F20 26
|
||||
SIG_EXPR_LIST_DECL_SINGLE(SD2DAT0, SD2, SD2_DESC);
|
||||
SIG_EXPR_DECL(GPID2IN, GPID2, GPID2_DESC);
|
||||
SIG_EXPR_DECL(GPID2IN, GPID, GPID_DESC);
|
||||
SIG_EXPR_LIST_DECL_DUAL(GPID2IN, GPID2, GPID);
|
||||
MS_PIN_DECL(D20, GPIOD2, SD2DAT0, GPID2IN);
|
||||
MS_PIN_DECL(F20, GPIOD2, SD2DAT0, GPID2IN);
|
||||
|
||||
#define D21 27
|
||||
#define D20 27
|
||||
SIG_EXPR_LIST_DECL_SINGLE(SD2DAT1, SD2, SD2_DESC);
|
||||
SIG_EXPR_DECL(GPID2OUT, GPID2, GPID2_DESC);
|
||||
SIG_EXPR_DECL(GPID2OUT, GPID, GPID_DESC);
|
||||
SIG_EXPR_LIST_DECL_DUAL(GPID2OUT, GPID2, GPID);
|
||||
MS_PIN_DECL(D21, GPIOD3, SD2DAT1, GPID2OUT);
|
||||
MS_PIN_DECL(D20, GPIOD3, SD2DAT1, GPID2OUT);
|
||||
|
||||
FUNC_GROUP_DECL(GPID2, D20, D21);
|
||||
FUNC_GROUP_DECL(GPID2, F20, D20);
|
||||
|
||||
#define GPIE_DESC SIG_DESC_SET(HW_STRAP1, 21)
|
||||
#define GPIE0_DESC SIG_DESC_SET(SCU8C, 12)
|
||||
@ -182,28 +182,88 @@ SIG_EXPR_LIST_DECL_SINGLE(NDCD3, NDCD3, SIG_DESC_SET(SCU80, 17));
|
||||
SIG_EXPR_DECL(GPIE0OUT, GPIE0, GPIE0_DESC);
|
||||
SIG_EXPR_DECL(GPIE0OUT, GPIE, GPIE_DESC);
|
||||
SIG_EXPR_LIST_DECL_DUAL(GPIE0OUT, GPIE0, GPIE);
|
||||
MS_PIN_DECL(C20, GPIE0, NDCD3, GPIE0OUT);
|
||||
MS_PIN_DECL(C20, GPIOE1, NDCD3, GPIE0OUT);
|
||||
|
||||
FUNC_GROUP_DECL(GPIE0, B20, C20);
|
||||
|
||||
#define SPI1_DESC SIG_DESC_SET(HW_STRAP1, 13)
|
||||
#define SPI1_DESC { HW_STRAP1, GENMASK(13, 12), 1, 0 }
|
||||
#define SPI1DEBUG_DESC { HW_STRAP1, GENMASK(13, 12), 2, 0 }
|
||||
#define SPI1PASSTHRU_DESC { HW_STRAP1, GENMASK(13, 12), 3, 0 }
|
||||
|
||||
#define C18 64
|
||||
SIG_EXPR_LIST_DECL_SINGLE(SYSCS, SPI1, COND1, SPI1_DESC);
|
||||
SIG_EXPR_DECL(SYSCS, SPI1DEBUG, COND1, SPI1DEBUG_DESC);
|
||||
SIG_EXPR_DECL(SYSCS, SPI1PASSTHRU, COND1, SPI1PASSTHRU_DESC);
|
||||
SIG_EXPR_LIST_DECL_DUAL(SYSCS, SPI1DEBUG, SPI1PASSTHRU);
|
||||
SS_PIN_DECL(C18, GPIOI0, SYSCS);
|
||||
|
||||
#define E15 65
|
||||
SIG_EXPR_LIST_DECL_SINGLE(SYSCK, SPI1, COND1, SPI1_DESC);
|
||||
SIG_EXPR_DECL(SYSCK, SPI1DEBUG, COND1, SPI1DEBUG_DESC);
|
||||
SIG_EXPR_DECL(SYSCK, SPI1PASSTHRU, COND1, SPI1PASSTHRU_DESC);
|
||||
SIG_EXPR_LIST_DECL_DUAL(SYSCK, SPI1DEBUG, SPI1PASSTHRU);
|
||||
SS_PIN_DECL(E15, GPIOI1, SYSCK);
|
||||
|
||||
#define A14 66
|
||||
SIG_EXPR_LIST_DECL_SINGLE(SYSMOSI, SPI1, COND1, SPI1_DESC);
|
||||
SS_PIN_DECL(A14, GPIOI2, SYSMOSI);
|
||||
#define B16 66
|
||||
SIG_EXPR_DECL(SYSMOSI, SPI1DEBUG, COND1, SPI1DEBUG_DESC);
|
||||
SIG_EXPR_DECL(SYSMOSI, SPI1PASSTHRU, COND1, SPI1PASSTHRU_DESC);
|
||||
SIG_EXPR_LIST_DECL_DUAL(SYSMOSI, SPI1DEBUG, SPI1PASSTHRU);
|
||||
SS_PIN_DECL(B16, GPIOI2, SYSMOSI);
|
||||
|
||||
#define C16 67
|
||||
SIG_EXPR_LIST_DECL_SINGLE(SYSMISO, SPI1, COND1, SPI1_DESC);
|
||||
SIG_EXPR_DECL(SYSMISO, SPI1DEBUG, COND1, SPI1DEBUG_DESC);
|
||||
SIG_EXPR_DECL(SYSMISO, SPI1PASSTHRU, COND1, SPI1PASSTHRU_DESC);
|
||||
SIG_EXPR_LIST_DECL_DUAL(SYSMISO, SPI1DEBUG, SPI1PASSTHRU);
|
||||
SS_PIN_DECL(C16, GPIOI3, SYSMISO);
|
||||
|
||||
FUNC_GROUP_DECL(SPI1, C18, E15, A14, C16);
|
||||
#define VB_DESC SIG_DESC_SET(HW_STRAP1, 5)
|
||||
|
||||
#define B15 68
|
||||
SIG_EXPR_DECL(SPI1CS0, SPI1, COND1, SPI1_DESC);
|
||||
SIG_EXPR_DECL(SPI1CS0, SPI1DEBUG, COND1, SPI1DEBUG_DESC);
|
||||
SIG_EXPR_DECL(SPI1CS0, SPI1PASSTHRU, COND1, SPI1PASSTHRU_DESC);
|
||||
SIG_EXPR_LIST_DECL(SPI1CS0, SIG_EXPR_PTR(SPI1CS0, SPI1),
|
||||
SIG_EXPR_PTR(SPI1CS0, SPI1DEBUG),
|
||||
SIG_EXPR_PTR(SPI1CS0, SPI1PASSTHRU));
|
||||
SIG_EXPR_LIST_DECL_SINGLE(VBCS, VGABIOSROM, COND1, VB_DESC);
|
||||
MS_PIN_DECL(B15, GPIOI4, SPI1CS0, VBCS);
|
||||
|
||||
#define C15 69
|
||||
SIG_EXPR_DECL(SPI1CK, SPI1, COND1, SPI1_DESC);
|
||||
SIG_EXPR_DECL(SPI1CK, SPI1DEBUG, COND1, SPI1DEBUG_DESC);
|
||||
SIG_EXPR_DECL(SPI1CK, SPI1PASSTHRU, COND1, SPI1PASSTHRU_DESC);
|
||||
SIG_EXPR_LIST_DECL(SPI1CK, SIG_EXPR_PTR(SPI1CK, SPI1),
|
||||
SIG_EXPR_PTR(SPI1CK, SPI1DEBUG),
|
||||
SIG_EXPR_PTR(SPI1CK, SPI1PASSTHRU));
|
||||
SIG_EXPR_LIST_DECL_SINGLE(VBCK, VGABIOSROM, COND1, VB_DESC);
|
||||
MS_PIN_DECL(C15, GPIOI5, SPI1CK, VBCK);
|
||||
|
||||
#define A14 70
|
||||
SIG_EXPR_DECL(SPI1MOSI, SPI1, COND1, SPI1_DESC);
|
||||
SIG_EXPR_DECL(SPI1MOSI, SPI1DEBUG, COND1, SPI1DEBUG_DESC);
|
||||
SIG_EXPR_DECL(SPI1MOSI, SPI1PASSTHRU, COND1, SPI1PASSTHRU_DESC);
|
||||
SIG_EXPR_LIST_DECL(SPI1MOSI, SIG_EXPR_PTR(SPI1MOSI, SPI1),
|
||||
SIG_EXPR_PTR(SPI1MOSI, SPI1DEBUG),
|
||||
SIG_EXPR_PTR(SPI1MOSI, SPI1PASSTHRU));
|
||||
SIG_EXPR_LIST_DECL_SINGLE(VBMOSI, VGABIOSROM, COND1, VB_DESC);
|
||||
MS_PIN_DECL(A14, GPIOI6, SPI1MOSI, VBMOSI);
|
||||
|
||||
#define A15 71
|
||||
SIG_EXPR_DECL(SPI1MISO, SPI1, COND1, SPI1_DESC);
|
||||
SIG_EXPR_DECL(SPI1MISO, SPI1DEBUG, COND1, SPI1DEBUG_DESC);
|
||||
SIG_EXPR_DECL(SPI1MISO, SPI1PASSTHRU, COND1, SPI1PASSTHRU_DESC);
|
||||
SIG_EXPR_LIST_DECL(SPI1MISO, SIG_EXPR_PTR(SPI1MISO, SPI1),
|
||||
SIG_EXPR_PTR(SPI1MISO, SPI1DEBUG),
|
||||
SIG_EXPR_PTR(SPI1MISO, SPI1PASSTHRU));
|
||||
SIG_EXPR_LIST_DECL_SINGLE(VBMISO, VGABIOSROM, COND1, VB_DESC);
|
||||
MS_PIN_DECL(A15, GPIOI7, SPI1MISO, VBMISO);
|
||||
|
||||
FUNC_GROUP_DECL(SPI1, B15, C15, A14, A15);
|
||||
FUNC_GROUP_DECL(SPI1DEBUG, C18, E15, B16, C16, B15, C15, A14, A15);
|
||||
FUNC_GROUP_DECL(SPI1PASSTHRU, C18, E15, B16, C16, B15, C15, A14, A15);
|
||||
FUNC_GROUP_DECL(VGABIOSROM, B15, C15, A14, A15);
|
||||
|
||||
#define R2 72
|
||||
SIG_EXPR_LIST_DECL_SINGLE(SGPMCK, SGPM, SIG_DESC_SET(SCU84, 8));
|
||||
SS_PIN_DECL(R2, GPIOJ0, SGPMCK);
|
||||
|
||||
#define L2 73
|
||||
SIG_EXPR_LIST_DECL_SINGLE(SGPMLD, SGPM, SIG_DESC_SET(SCU84, 9));
|
||||
@ -580,6 +640,7 @@ static struct pinctrl_pin_desc aspeed_g5_pins[ASPEED_G5_NR_PINS] = {
|
||||
ASPEED_PINCTRL_PIN(A12),
|
||||
ASPEED_PINCTRL_PIN(A13),
|
||||
ASPEED_PINCTRL_PIN(A14),
|
||||
ASPEED_PINCTRL_PIN(A15),
|
||||
ASPEED_PINCTRL_PIN(A2),
|
||||
ASPEED_PINCTRL_PIN(A3),
|
||||
ASPEED_PINCTRL_PIN(A4),
|
||||
@ -592,6 +653,8 @@ static struct pinctrl_pin_desc aspeed_g5_pins[ASPEED_G5_NR_PINS] = {
|
||||
ASPEED_PINCTRL_PIN(B12),
|
||||
ASPEED_PINCTRL_PIN(B13),
|
||||
ASPEED_PINCTRL_PIN(B14),
|
||||
ASPEED_PINCTRL_PIN(B15),
|
||||
ASPEED_PINCTRL_PIN(B16),
|
||||
ASPEED_PINCTRL_PIN(B2),
|
||||
ASPEED_PINCTRL_PIN(B20),
|
||||
ASPEED_PINCTRL_PIN(B3),
|
||||
@ -603,6 +666,7 @@ static struct pinctrl_pin_desc aspeed_g5_pins[ASPEED_G5_NR_PINS] = {
|
||||
ASPEED_PINCTRL_PIN(C12),
|
||||
ASPEED_PINCTRL_PIN(C13),
|
||||
ASPEED_PINCTRL_PIN(C14),
|
||||
ASPEED_PINCTRL_PIN(C15),
|
||||
ASPEED_PINCTRL_PIN(C16),
|
||||
ASPEED_PINCTRL_PIN(C18),
|
||||
ASPEED_PINCTRL_PIN(C2),
|
||||
@ -614,7 +678,6 @@ static struct pinctrl_pin_desc aspeed_g5_pins[ASPEED_G5_NR_PINS] = {
|
||||
ASPEED_PINCTRL_PIN(D10),
|
||||
ASPEED_PINCTRL_PIN(D2),
|
||||
ASPEED_PINCTRL_PIN(D20),
|
||||
ASPEED_PINCTRL_PIN(D21),
|
||||
ASPEED_PINCTRL_PIN(D4),
|
||||
ASPEED_PINCTRL_PIN(D5),
|
||||
ASPEED_PINCTRL_PIN(D6),
|
||||
@ -630,6 +693,7 @@ static struct pinctrl_pin_desc aspeed_g5_pins[ASPEED_G5_NR_PINS] = {
|
||||
ASPEED_PINCTRL_PIN(E7),
|
||||
ASPEED_PINCTRL_PIN(E9),
|
||||
ASPEED_PINCTRL_PIN(F19),
|
||||
ASPEED_PINCTRL_PIN(F20),
|
||||
ASPEED_PINCTRL_PIN(F9),
|
||||
ASPEED_PINCTRL_PIN(H20),
|
||||
ASPEED_PINCTRL_PIN(L1),
|
||||
@ -691,11 +755,14 @@ static const struct aspeed_pin_group aspeed_g5_groups[] = {
|
||||
ASPEED_PINCTRL_GROUP(RMII2),
|
||||
ASPEED_PINCTRL_GROUP(SD1),
|
||||
ASPEED_PINCTRL_GROUP(SPI1),
|
||||
ASPEED_PINCTRL_GROUP(SPI1DEBUG),
|
||||
ASPEED_PINCTRL_GROUP(SPI1PASSTHRU),
|
||||
ASPEED_PINCTRL_GROUP(TIMER4),
|
||||
ASPEED_PINCTRL_GROUP(TIMER5),
|
||||
ASPEED_PINCTRL_GROUP(TIMER6),
|
||||
ASPEED_PINCTRL_GROUP(TIMER7),
|
||||
ASPEED_PINCTRL_GROUP(TIMER8),
|
||||
ASPEED_PINCTRL_GROUP(VGABIOSROM),
|
||||
};
|
||||
|
||||
static const struct aspeed_pin_function aspeed_g5_functions[] = {
|
||||
@ -733,11 +800,14 @@ static const struct aspeed_pin_function aspeed_g5_functions[] = {
|
||||
ASPEED_PINCTRL_FUNC(RMII2),
|
||||
ASPEED_PINCTRL_FUNC(SD1),
|
||||
ASPEED_PINCTRL_FUNC(SPI1),
|
||||
ASPEED_PINCTRL_FUNC(SPI1DEBUG),
|
||||
ASPEED_PINCTRL_FUNC(SPI1PASSTHRU),
|
||||
ASPEED_PINCTRL_FUNC(TIMER4),
|
||||
ASPEED_PINCTRL_FUNC(TIMER5),
|
||||
ASPEED_PINCTRL_FUNC(TIMER6),
|
||||
ASPEED_PINCTRL_FUNC(TIMER7),
|
||||
ASPEED_PINCTRL_FUNC(TIMER8),
|
||||
ASPEED_PINCTRL_FUNC(VGABIOSROM),
|
||||
};
|
||||
|
||||
static struct aspeed_pinctrl_data aspeed_g5_pinctrl_data = {
|
||||
|
@ -166,13 +166,9 @@ static bool aspeed_sig_expr_set(const struct aspeed_sig_expr *expr,
|
||||
bool enable, struct regmap *map)
|
||||
{
|
||||
int i;
|
||||
bool ret;
|
||||
|
||||
ret = aspeed_sig_expr_eval(expr, enable, map);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
for (i = 0; i < expr->ndescs; i++) {
|
||||
bool ret;
|
||||
const struct aspeed_sig_desc *desc = &expr->descs[i];
|
||||
u32 pattern = enable ? desc->enable : desc->disable;
|
||||
|
||||
@ -199,12 +195,18 @@ static bool aspeed_sig_expr_set(const struct aspeed_sig_expr *expr,
|
||||
static bool aspeed_sig_expr_enable(const struct aspeed_sig_expr *expr,
|
||||
struct regmap *map)
|
||||
{
|
||||
if (aspeed_sig_expr_eval(expr, true, map))
|
||||
return true;
|
||||
|
||||
return aspeed_sig_expr_set(expr, true, map);
|
||||
}
|
||||
|
||||
static bool aspeed_sig_expr_disable(const struct aspeed_sig_expr *expr,
|
||||
struct regmap *map)
|
||||
{
|
||||
if (!aspeed_sig_expr_eval(expr, true, map))
|
||||
return true;
|
||||
|
||||
return aspeed_sig_expr_set(expr, false, map);
|
||||
}
|
||||
|
||||
|
@ -1808,6 +1808,8 @@ static int byt_pinctrl_probe(struct platform_device *pdev)
|
||||
return PTR_ERR(vg->pctl_dev);
|
||||
}
|
||||
|
||||
raw_spin_lock_init(&vg->lock);
|
||||
|
||||
ret = byt_gpio_probe(vg);
|
||||
if (ret) {
|
||||
pinctrl_unregister(vg->pctl_dev);
|
||||
@ -1815,7 +1817,6 @@ static int byt_pinctrl_probe(struct platform_device *pdev)
|
||||
}
|
||||
|
||||
platform_set_drvdata(pdev, vg);
|
||||
raw_spin_lock_init(&vg->lock);
|
||||
pm_runtime_enable(&pdev->dev);
|
||||
|
||||
return 0;
|
||||
|
@ -19,6 +19,7 @@
|
||||
#include <linux/pinctrl/pinconf.h>
|
||||
#include <linux/pinctrl/pinconf-generic.h>
|
||||
|
||||
#include "../core.h"
|
||||
#include "pinctrl-intel.h"
|
||||
|
||||
/* Offset from regs */
|
||||
@ -1056,6 +1057,26 @@ int intel_pinctrl_remove(struct platform_device *pdev)
|
||||
EXPORT_SYMBOL_GPL(intel_pinctrl_remove);
|
||||
|
||||
#ifdef CONFIG_PM_SLEEP
|
||||
static bool intel_pinctrl_should_save(struct intel_pinctrl *pctrl, unsigned pin)
|
||||
{
|
||||
const struct pin_desc *pd = pin_desc_get(pctrl->pctldev, pin);
|
||||
|
||||
if (!pd || !intel_pad_usable(pctrl, pin))
|
||||
return false;
|
||||
|
||||
/*
|
||||
* Only restore the pin if it is actually in use by the kernel (or
|
||||
* by userspace). It is possible that some pins are used by the
|
||||
* BIOS during resume and those are not always locked down so leave
|
||||
* them alone.
|
||||
*/
|
||||
if (pd->mux_owner || pd->gpio_owner ||
|
||||
gpiochip_line_is_irq(&pctrl->chip, pin))
|
||||
return true;
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
int intel_pinctrl_suspend(struct device *dev)
|
||||
{
|
||||
struct platform_device *pdev = to_platform_device(dev);
|
||||
@ -1069,7 +1090,7 @@ int intel_pinctrl_suspend(struct device *dev)
|
||||
const struct pinctrl_pin_desc *desc = &pctrl->soc->pins[i];
|
||||
u32 val;
|
||||
|
||||
if (!intel_pad_usable(pctrl, desc->number))
|
||||
if (!intel_pinctrl_should_save(pctrl, desc->number))
|
||||
continue;
|
||||
|
||||
val = readl(intel_get_padcfg(pctrl, desc->number, PADCFG0));
|
||||
@ -1130,7 +1151,7 @@ int intel_pinctrl_resume(struct device *dev)
|
||||
void __iomem *padcfg;
|
||||
u32 val;
|
||||
|
||||
if (!intel_pad_usable(pctrl, desc->number))
|
||||
if (!intel_pinctrl_should_save(pctrl, desc->number))
|
||||
continue;
|
||||
|
||||
padcfg = intel_get_padcfg(pctrl, desc->number, PADCFG0);
|
||||
|
Loading…
Reference in New Issue
Block a user