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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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pinctrl: nomadik: Drop U8540/9540 support
The U8540 was an evolved version of the U8500, but it was never mass produced or put into products, only reference designs exist. The upstream support was never completed and it is unlikely that this will happen so drop the support for now to simplify maintenance of the U8500. Cc: Loic Pallardy <loic.pallardy@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Linus Walleij
parent
76a16885a7
commit
b6d09f7807
@ -11,14 +11,6 @@ config PINCTRL_AB8500
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bool "AB8500 pin controller driver"
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depends on PINCTRL_ABX500 && ARCH_U8500
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config PINCTRL_AB8540
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bool "AB8540 pin controller driver"
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depends on PINCTRL_ABX500 && ARCH_U8500
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config PINCTRL_AB9540
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bool "AB9540 pin controller driver"
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depends on PINCTRL_ABX500 && ARCH_U8500
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config PINCTRL_AB8505
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bool "AB8505 pin controller driver"
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depends on PINCTRL_ABX500 && ARCH_U8500
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@ -44,8 +36,4 @@ config PINCTRL_DB8500
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bool "DB8500 pin controller driver"
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depends on PINCTRL_NOMADIK && ARCH_U8500
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config PINCTRL_DB8540
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bool "DB8540 pin controller driver"
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depends on PINCTRL_NOMADIK && ARCH_U8500
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endif
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@ -2,10 +2,7 @@
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# Nomadik family pin control drivers
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obj-$(CONFIG_PINCTRL_ABX500) += pinctrl-abx500.o
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obj-$(CONFIG_PINCTRL_AB8500) += pinctrl-ab8500.o
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obj-$(CONFIG_PINCTRL_AB8540) += pinctrl-ab8540.o
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obj-$(CONFIG_PINCTRL_AB9540) += pinctrl-ab9540.o
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obj-$(CONFIG_PINCTRL_AB8505) += pinctrl-ab8505.o
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obj-$(CONFIG_PINCTRL_NOMADIK) += pinctrl-nomadik.o
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obj-$(CONFIG_PINCTRL_STN8815) += pinctrl-nomadik-stn8815.o
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obj-$(CONFIG_PINCTRL_DB8500) += pinctrl-nomadik-db8500.o
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obj-$(CONFIG_PINCTRL_DB8540) += pinctrl-nomadik-db8540.o
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@ -1,408 +0,0 @@
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/*
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* Copyright (C) ST-Ericsson SA 2012
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*
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* Author: Patrice Chotard <patrice.chotard@stericsson.com> for ST-Ericsson.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/gpio.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/mfd/abx500/ab8500.h>
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#include "pinctrl-abx500.h"
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/* All the pins that can be used for GPIO and some other functions */
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#define ABX500_GPIO(offset) (offset)
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#define AB8540_PIN_J16 ABX500_GPIO(1)
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#define AB8540_PIN_D17 ABX500_GPIO(2)
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#define AB8540_PIN_C12 ABX500_GPIO(3)
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#define AB8540_PIN_G12 ABX500_GPIO(4)
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/* hole */
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#define AB8540_PIN_D16 ABX500_GPIO(14)
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#define AB8540_PIN_F15 ABX500_GPIO(15)
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#define AB8540_PIN_J8 ABX500_GPIO(16)
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#define AB8540_PIN_K16 ABX500_GPIO(17)
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#define AB8540_PIN_G15 ABX500_GPIO(18)
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#define AB8540_PIN_F17 ABX500_GPIO(19)
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#define AB8540_PIN_E17 ABX500_GPIO(20)
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/* hole */
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#define AB8540_PIN_AA16 ABX500_GPIO(27)
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#define AB8540_PIN_W18 ABX500_GPIO(28)
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#define AB8540_PIN_Y15 ABX500_GPIO(29)
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#define AB8540_PIN_W16 ABX500_GPIO(30)
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#define AB8540_PIN_V15 ABX500_GPIO(31)
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#define AB8540_PIN_W17 ABX500_GPIO(32)
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/* hole */
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#define AB8540_PIN_D12 ABX500_GPIO(42)
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#define AB8540_PIN_P4 ABX500_GPIO(43)
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#define AB8540_PIN_AB1 ABX500_GPIO(44)
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#define AB8540_PIN_K7 ABX500_GPIO(45)
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#define AB8540_PIN_L7 ABX500_GPIO(46)
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#define AB8540_PIN_G10 ABX500_GPIO(47)
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#define AB8540_PIN_K12 ABX500_GPIO(48)
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/* hole */
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#define AB8540_PIN_N8 ABX500_GPIO(51)
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#define AB8540_PIN_P12 ABX500_GPIO(52)
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#define AB8540_PIN_K8 ABX500_GPIO(53)
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#define AB8540_PIN_J11 ABX500_GPIO(54)
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#define AB8540_PIN_AC2 ABX500_GPIO(55)
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#define AB8540_PIN_AB2 ABX500_GPIO(56)
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/* indicates the highest GPIO number */
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#define AB8540_GPIO_MAX_NUMBER 56
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/*
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* The names of the pins are denoted by GPIO number and ball name, even
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* though they can be used for other things than GPIO, this is the first
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* column in the table of the data sheet and often used on schematics and
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* such.
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*/
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static const struct pinctrl_pin_desc ab8540_pins[] = {
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PINCTRL_PIN(AB8540_PIN_J16, "GPIO1_J16"),
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PINCTRL_PIN(AB8540_PIN_D17, "GPIO2_D17"),
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PINCTRL_PIN(AB8540_PIN_C12, "GPIO3_C12"),
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PINCTRL_PIN(AB8540_PIN_G12, "GPIO4_G12"),
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/* hole */
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PINCTRL_PIN(AB8540_PIN_D16, "GPIO14_D16"),
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PINCTRL_PIN(AB8540_PIN_F15, "GPIO15_F15"),
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PINCTRL_PIN(AB8540_PIN_J8, "GPIO16_J8"),
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PINCTRL_PIN(AB8540_PIN_K16, "GPIO17_K16"),
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PINCTRL_PIN(AB8540_PIN_G15, "GPIO18_G15"),
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PINCTRL_PIN(AB8540_PIN_F17, "GPIO19_F17"),
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PINCTRL_PIN(AB8540_PIN_E17, "GPIO20_E17"),
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/* hole */
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PINCTRL_PIN(AB8540_PIN_AA16, "GPIO27_AA16"),
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PINCTRL_PIN(AB8540_PIN_W18, "GPIO28_W18"),
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PINCTRL_PIN(AB8540_PIN_Y15, "GPIO29_Y15"),
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PINCTRL_PIN(AB8540_PIN_W16, "GPIO30_W16"),
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PINCTRL_PIN(AB8540_PIN_V15, "GPIO31_V15"),
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PINCTRL_PIN(AB8540_PIN_W17, "GPIO32_W17"),
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/* hole */
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PINCTRL_PIN(AB8540_PIN_D12, "GPIO42_D12"),
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PINCTRL_PIN(AB8540_PIN_P4, "GPIO43_P4"),
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PINCTRL_PIN(AB8540_PIN_AB1, "GPIO44_AB1"),
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PINCTRL_PIN(AB8540_PIN_K7, "GPIO45_K7"),
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PINCTRL_PIN(AB8540_PIN_L7, "GPIO46_L7"),
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PINCTRL_PIN(AB8540_PIN_G10, "GPIO47_G10"),
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PINCTRL_PIN(AB8540_PIN_K12, "GPIO48_K12"),
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/* hole */
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PINCTRL_PIN(AB8540_PIN_N8, "GPIO51_N8"),
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PINCTRL_PIN(AB8540_PIN_P12, "GPIO52_P12"),
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PINCTRL_PIN(AB8540_PIN_K8, "GPIO53_K8"),
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PINCTRL_PIN(AB8540_PIN_J11, "GPIO54_J11"),
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PINCTRL_PIN(AB8540_PIN_AC2, "GPIO55_AC2"),
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PINCTRL_PIN(AB8540_PIN_AB2, "GPIO56_AB2"),
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};
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/*
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* Maps local GPIO offsets to local pin numbers
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*/
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static const struct abx500_pinrange ab8540_pinranges[] = {
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ABX500_PINRANGE(1, 4, ABX500_ALT_A),
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ABX500_PINRANGE(14, 7, ABX500_ALT_A),
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ABX500_PINRANGE(27, 6, ABX500_ALT_A),
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ABX500_PINRANGE(42, 7, ABX500_ALT_A),
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ABX500_PINRANGE(51, 6, ABX500_ALT_A),
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};
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/*
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* Read the pin group names like this:
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* sysclkreq2_d_1 = first groups of pins for sysclkreq2 on default function
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*
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* The groups are arranged as sets per altfunction column, so we can
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* mux in one group at a time by selecting the same altfunction for them
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* all. When functions require pins on different altfunctions, you need
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* to combine several groups.
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*/
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/* default column */
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static const unsigned sysclkreq2_d_1_pins[] = { AB8540_PIN_J16 };
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static const unsigned sysclkreq3_d_1_pins[] = { AB8540_PIN_D17 };
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static const unsigned sysclkreq4_d_1_pins[] = { AB8540_PIN_C12 };
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static const unsigned sysclkreq6_d_1_pins[] = { AB8540_PIN_G12 };
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static const unsigned pwmout1_d_1_pins[] = { AB8540_PIN_D16 };
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static const unsigned pwmout2_d_1_pins[] = { AB8540_PIN_F15 };
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static const unsigned pwmout3_d_1_pins[] = { AB8540_PIN_J8 };
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/* audio data interface 1*/
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static const unsigned adi1_d_1_pins[] = { AB8540_PIN_K16, AB8540_PIN_G15,
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AB8540_PIN_F17, AB8540_PIN_E17 };
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/* Digital microphone 1 and 2 */
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static const unsigned dmic12_d_1_pins[] = { AB8540_PIN_AA16, AB8540_PIN_W18 };
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/* Digital microphone 3 and 4 */
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static const unsigned dmic34_d_1_pins[] = { AB8540_PIN_Y15, AB8540_PIN_W16 };
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/* Digital microphone 5 and 6 */
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static const unsigned dmic56_d_1_pins[] = { AB8540_PIN_V15, AB8540_PIN_W17 };
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static const unsigned sysclkreq5_d_1_pins[] = { AB8540_PIN_D12 };
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static const unsigned batremn_d_1_pins[] = { AB8540_PIN_P4 };
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static const unsigned service_d_1_pins[] = { AB8540_PIN_AB1 };
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static const unsigned pwrctrl0_d_1_pins[] = { AB8540_PIN_K7 };
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static const unsigned pwrctrl1_d_1_pins[] = { AB8540_PIN_L7 };
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static const unsigned pwmextvibra1_d_1_pins[] = { AB8540_PIN_G10 };
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static const unsigned pwmextvibra2_d_1_pins[] = { AB8540_PIN_K12 };
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static const unsigned gpio1_vbat_d_1_pins[] = { AB8540_PIN_N8 };
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static const unsigned gpio2_vbat_d_1_pins[] = { AB8540_PIN_P12 };
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static const unsigned gpio3_vbat_d_1_pins[] = { AB8540_PIN_K8 };
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static const unsigned gpio4_vbat_d_1_pins[] = { AB8540_PIN_J11 };
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static const unsigned pdmclkdat_d_1_pins[] = { AB8540_PIN_AC2, AB8540_PIN_AB2 };
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/* Altfunction A column */
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static const unsigned gpio1_a_1_pins[] = { AB8540_PIN_J16 };
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static const unsigned gpio2_a_1_pins[] = { AB8540_PIN_D17 };
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static const unsigned gpio3_a_1_pins[] = { AB8540_PIN_C12 };
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static const unsigned gpio4_a_1_pins[] = { AB8540_PIN_G12 };
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static const unsigned gpio14_a_1_pins[] = { AB8540_PIN_D16 };
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static const unsigned gpio15_a_1_pins[] = { AB8540_PIN_F15 };
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static const unsigned gpio16_a_1_pins[] = { AB8540_PIN_J8 };
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static const unsigned gpio17_a_1_pins[] = { AB8540_PIN_K16 };
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static const unsigned gpio18_a_1_pins[] = { AB8540_PIN_G15 };
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static const unsigned gpio19_a_1_pins[] = { AB8540_PIN_F17 };
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static const unsigned gpio20_a_1_pins[] = { AB8540_PIN_E17 };
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static const unsigned gpio27_a_1_pins[] = { AB8540_PIN_AA16 };
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static const unsigned gpio28_a_1_pins[] = { AB8540_PIN_W18 };
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static const unsigned gpio29_a_1_pins[] = { AB8540_PIN_Y15 };
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static const unsigned gpio30_a_1_pins[] = { AB8540_PIN_W16 };
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static const unsigned gpio31_a_1_pins[] = { AB8540_PIN_V15 };
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static const unsigned gpio32_a_1_pins[] = { AB8540_PIN_W17 };
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static const unsigned gpio42_a_1_pins[] = { AB8540_PIN_D12 };
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static const unsigned gpio43_a_1_pins[] = { AB8540_PIN_P4 };
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static const unsigned gpio44_a_1_pins[] = { AB8540_PIN_AB1 };
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static const unsigned gpio45_a_1_pins[] = { AB8540_PIN_K7 };
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static const unsigned gpio46_a_1_pins[] = { AB8540_PIN_L7 };
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static const unsigned gpio47_a_1_pins[] = { AB8540_PIN_G10 };
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static const unsigned gpio48_a_1_pins[] = { AB8540_PIN_K12 };
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static const unsigned gpio51_a_1_pins[] = { AB8540_PIN_N8 };
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static const unsigned gpio52_a_1_pins[] = { AB8540_PIN_P12 };
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static const unsigned gpio53_a_1_pins[] = { AB8540_PIN_K8 };
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static const unsigned gpio54_a_1_pins[] = { AB8540_PIN_J11 };
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static const unsigned gpio55_a_1_pins[] = { AB8540_PIN_AC2 };
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static const unsigned gpio56_a_1_pins[] = { AB8540_PIN_AB2 };
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#define AB8540_PIN_GROUP(a, b) { .name = #a, .pins = a##_pins, \
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.npins = ARRAY_SIZE(a##_pins), .altsetting = b }
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static const struct abx500_pingroup ab8540_groups[] = {
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/* default column */
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AB8540_PIN_GROUP(sysclkreq2_d_1, ABX500_DEFAULT),
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AB8540_PIN_GROUP(sysclkreq3_d_1, ABX500_DEFAULT),
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AB8540_PIN_GROUP(sysclkreq4_d_1, ABX500_DEFAULT),
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AB8540_PIN_GROUP(sysclkreq6_d_1, ABX500_DEFAULT),
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AB8540_PIN_GROUP(pwmout1_d_1, ABX500_DEFAULT),
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AB8540_PIN_GROUP(pwmout2_d_1, ABX500_DEFAULT),
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AB8540_PIN_GROUP(pwmout3_d_1, ABX500_DEFAULT),
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AB8540_PIN_GROUP(adi1_d_1, ABX500_DEFAULT),
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AB8540_PIN_GROUP(dmic12_d_1, ABX500_DEFAULT),
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AB8540_PIN_GROUP(dmic34_d_1, ABX500_DEFAULT),
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AB8540_PIN_GROUP(dmic56_d_1, ABX500_DEFAULT),
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AB8540_PIN_GROUP(sysclkreq5_d_1, ABX500_DEFAULT),
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AB8540_PIN_GROUP(batremn_d_1, ABX500_DEFAULT),
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AB8540_PIN_GROUP(service_d_1, ABX500_DEFAULT),
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AB8540_PIN_GROUP(pwrctrl0_d_1, ABX500_DEFAULT),
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AB8540_PIN_GROUP(pwrctrl1_d_1, ABX500_DEFAULT),
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AB8540_PIN_GROUP(pwmextvibra1_d_1, ABX500_DEFAULT),
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AB8540_PIN_GROUP(pwmextvibra2_d_1, ABX500_DEFAULT),
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AB8540_PIN_GROUP(gpio1_vbat_d_1, ABX500_DEFAULT),
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AB8540_PIN_GROUP(gpio2_vbat_d_1, ABX500_DEFAULT),
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AB8540_PIN_GROUP(gpio3_vbat_d_1, ABX500_DEFAULT),
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AB8540_PIN_GROUP(gpio4_vbat_d_1, ABX500_DEFAULT),
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AB8540_PIN_GROUP(pdmclkdat_d_1, ABX500_DEFAULT),
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/* Altfunction A column */
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AB8540_PIN_GROUP(gpio1_a_1, ABX500_ALT_A),
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AB8540_PIN_GROUP(gpio2_a_1, ABX500_ALT_A),
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AB8540_PIN_GROUP(gpio3_a_1, ABX500_ALT_A),
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AB8540_PIN_GROUP(gpio4_a_1, ABX500_ALT_A),
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AB8540_PIN_GROUP(gpio14_a_1, ABX500_ALT_A),
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AB8540_PIN_GROUP(gpio15_a_1, ABX500_ALT_A),
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AB8540_PIN_GROUP(gpio16_a_1, ABX500_ALT_A),
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AB8540_PIN_GROUP(gpio17_a_1, ABX500_ALT_A),
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AB8540_PIN_GROUP(gpio18_a_1, ABX500_ALT_A),
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AB8540_PIN_GROUP(gpio19_a_1, ABX500_ALT_A),
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AB8540_PIN_GROUP(gpio20_a_1, ABX500_ALT_A),
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AB8540_PIN_GROUP(gpio27_a_1, ABX500_ALT_A),
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AB8540_PIN_GROUP(gpio28_a_1, ABX500_ALT_A),
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AB8540_PIN_GROUP(gpio29_a_1, ABX500_ALT_A),
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AB8540_PIN_GROUP(gpio30_a_1, ABX500_ALT_A),
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AB8540_PIN_GROUP(gpio31_a_1, ABX500_ALT_A),
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AB8540_PIN_GROUP(gpio32_a_1, ABX500_ALT_A),
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AB8540_PIN_GROUP(gpio42_a_1, ABX500_ALT_A),
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AB8540_PIN_GROUP(gpio43_a_1, ABX500_ALT_A),
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AB8540_PIN_GROUP(gpio44_a_1, ABX500_ALT_A),
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AB8540_PIN_GROUP(gpio45_a_1, ABX500_ALT_A),
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AB8540_PIN_GROUP(gpio46_a_1, ABX500_ALT_A),
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AB8540_PIN_GROUP(gpio47_a_1, ABX500_ALT_A),
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AB8540_PIN_GROUP(gpio48_a_1, ABX500_ALT_A),
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AB8540_PIN_GROUP(gpio51_a_1, ABX500_ALT_A),
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AB8540_PIN_GROUP(gpio52_a_1, ABX500_ALT_A),
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AB8540_PIN_GROUP(gpio53_a_1, ABX500_ALT_A),
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AB8540_PIN_GROUP(gpio54_a_1, ABX500_ALT_A),
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AB8540_PIN_GROUP(gpio55_a_1, ABX500_ALT_A),
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AB8540_PIN_GROUP(gpio56_a_1, ABX500_ALT_A),
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};
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/* We use this macro to define the groups applicable to a function */
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#define AB8540_FUNC_GROUPS(a, b...) \
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static const char * const a##_groups[] = { b };
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AB8540_FUNC_GROUPS(sysclkreq, "sysclkreq2_d_1", "sysclkreq3_d_1",
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"sysclkreq4_d_1", "sysclkreq5_d_1", "sysclkreq6_d_1");
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AB8540_FUNC_GROUPS(gpio, "gpio1_a_1", "gpio2_a_1", "gpio3_a_1", "gpio4_a_1",
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"gpio14_a_1", "gpio15_a_1", "gpio16_a_1", "gpio17_a_1",
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"gpio18_a_1", "gpio19_a_1", "gpio20_a_1", "gpio27_a_1",
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"gpio28_a_1", "gpio29_a_1", "gpio30_a_1", "gpio31_a_1",
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"gpio32_a_1", "gpio42_a_1", "gpio43_a_1", "gpio44_a_1",
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"gpio45_a_1", "gpio46_a_1", "gpio47_a_1", "gpio48_a_1",
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"gpio51_a_1", "gpio52_a_1", "gpio53_a_1", "gpio54_a_1",
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"gpio55_a_1", "gpio56_a_1");
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AB8540_FUNC_GROUPS(pwmout, "pwmout1_d_1", "pwmout2_d_1", "pwmout3_d_1");
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AB8540_FUNC_GROUPS(adi1, "adi1_d_1");
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AB8540_FUNC_GROUPS(dmic, "dmic12_d_1", "dmic34_d_1", "dmic56_d_1");
|
||||
AB8540_FUNC_GROUPS(batremn, "batremn_d_1");
|
||||
AB8540_FUNC_GROUPS(service, "service_d_1");
|
||||
AB8540_FUNC_GROUPS(pwrctrl, "pwrctrl0_d_1", "pwrctrl1_d_1");
|
||||
AB8540_FUNC_GROUPS(pwmextvibra, "pwmextvibra1_d_1", "pwmextvibra2_d_1");
|
||||
AB8540_FUNC_GROUPS(gpio_vbat, "gpio1_vbat_d_1", "gpio2_vbat_d_1",
|
||||
"gpio3_vbat_d_1", "gpio4_vbat_d_1");
|
||||
AB8540_FUNC_GROUPS(pdm, "pdmclkdat_d_1");
|
||||
|
||||
#define FUNCTION(fname) \
|
||||
{ \
|
||||
.name = #fname, \
|
||||
.groups = fname##_groups, \
|
||||
.ngroups = ARRAY_SIZE(fname##_groups), \
|
||||
}
|
||||
|
||||
static const struct abx500_function ab8540_functions[] = {
|
||||
FUNCTION(sysclkreq),
|
||||
FUNCTION(gpio),
|
||||
FUNCTION(pwmout),
|
||||
FUNCTION(adi1),
|
||||
FUNCTION(dmic),
|
||||
FUNCTION(batremn),
|
||||
FUNCTION(service),
|
||||
FUNCTION(pwrctrl),
|
||||
FUNCTION(pwmextvibra),
|
||||
FUNCTION(gpio_vbat),
|
||||
FUNCTION(pdm),
|
||||
};
|
||||
|
||||
/*
|
||||
* this table translates what's is in the AB8540 specification regarding the
|
||||
* balls alternate functions (as for DB, default, ALT_A, ALT_B and ALT_C).
|
||||
* ALTERNATE_FUNCTIONS(GPIO_NUMBER, GPIOSEL bit, ALTERNATFUNC bit1,
|
||||
* ALTERNATEFUNC bit2, ALTA val, ALTB val, ALTC val),
|
||||
* AB8540 only supports DEFAULT and ALTA functions, so ALTERNATFUNC
|
||||
* registers is not used
|
||||
*
|
||||
*/
|
||||
|
||||
static struct
|
||||
alternate_functions ab8540_alternate_functions[AB8540_GPIO_MAX_NUMBER + 1] = {
|
||||
/* GPIOSEL1 - bit 4-7 reserved */
|
||||
ALTERNATE_FUNCTIONS(0, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO0 */
|
||||
ALTERNATE_FUNCTIONS(1, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO1, altA controlled by bit 0 */
|
||||
ALTERNATE_FUNCTIONS(2, 1, UNUSED, UNUSED, 0, 0, 0), /* GPIO2, altA controlled by bit 1 */
|
||||
ALTERNATE_FUNCTIONS(3, 2, UNUSED, UNUSED, 0, 0, 0), /* GPIO3, altA controlled by bit 2*/
|
||||
ALTERNATE_FUNCTIONS(4, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO4, altA controlled by bit 3*/
|
||||
ALTERNATE_FUNCTIONS(5, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO5 */
|
||||
ALTERNATE_FUNCTIONS(6, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO6 */
|
||||
ALTERNATE_FUNCTIONS(7, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO7 */
|
||||
ALTERNATE_FUNCTIONS(8, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO8 */
|
||||
/* GPIOSEL2 - bit 0-4 reserved */
|
||||
ALTERNATE_FUNCTIONS(9, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO9 */
|
||||
ALTERNATE_FUNCTIONS(10, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO10 */
|
||||
ALTERNATE_FUNCTIONS(11, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO11 */
|
||||
ALTERNATE_FUNCTIONS(12, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO12 */
|
||||
ALTERNATE_FUNCTIONS(13, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO13 */
|
||||
ALTERNATE_FUNCTIONS(14, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO14, altA controlled by bit 5 */
|
||||
ALTERNATE_FUNCTIONS(15, 6, UNUSED, UNUSED, 0, 0, 0), /* GPIO15, altA controlled by bit 6 */
|
||||
ALTERNATE_FUNCTIONS(16, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO16, altA controlled by bit 7 */
|
||||
/* GPIOSEL3 - bit 4-7 reserved */
|
||||
ALTERNATE_FUNCTIONS(17, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO17, altA controlled by bit 0 */
|
||||
ALTERNATE_FUNCTIONS(18, 1, UNUSED, UNUSED, 0, 0, 0), /* GPIO18, altA controlled by bit 1 */
|
||||
ALTERNATE_FUNCTIONS(19, 2, UNUSED, UNUSED, 0, 0, 0), /* GPIO19, altA controlled by bit 2 */
|
||||
ALTERNATE_FUNCTIONS(20, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO20, altA controlled by bit 3 */
|
||||
ALTERNATE_FUNCTIONS(21, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO21 */
|
||||
ALTERNATE_FUNCTIONS(22, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO22 */
|
||||
ALTERNATE_FUNCTIONS(23, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO23 */
|
||||
ALTERNATE_FUNCTIONS(24, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO24 */
|
||||
/* GPIOSEL4 - bit 0-1 reserved */
|
||||
ALTERNATE_FUNCTIONS(25, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO25 */
|
||||
ALTERNATE_FUNCTIONS(26, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO26 */
|
||||
ALTERNATE_FUNCTIONS(27, 2, UNUSED, UNUSED, 0, 0, 0), /* GPIO27, altA controlled by bit 2 */
|
||||
ALTERNATE_FUNCTIONS(28, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO28, altA controlled by bit 3 */
|
||||
ALTERNATE_FUNCTIONS(29, 4, UNUSED, UNUSED, 0, 0, 0), /* GPIO29, altA controlled by bit 4 */
|
||||
ALTERNATE_FUNCTIONS(30, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO30, altA controlled by bit 5 */
|
||||
ALTERNATE_FUNCTIONS(31, 6, UNUSED, UNUSED, 0, 0, 0), /* GPIO31, altA controlled by bit 6 */
|
||||
ALTERNATE_FUNCTIONS(32, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO32, altA controlled by bit 7 */
|
||||
/* GPIOSEL5 - bit 0-7 reserved */
|
||||
ALTERNATE_FUNCTIONS(33, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO33 */
|
||||
ALTERNATE_FUNCTIONS(34, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO34 */
|
||||
ALTERNATE_FUNCTIONS(35, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO35 */
|
||||
ALTERNATE_FUNCTIONS(36, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO36 */
|
||||
ALTERNATE_FUNCTIONS(37, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO37 */
|
||||
ALTERNATE_FUNCTIONS(38, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO38 */
|
||||
ALTERNATE_FUNCTIONS(39, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO39 */
|
||||
ALTERNATE_FUNCTIONS(40, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO40 */
|
||||
/* GPIOSEL6 - bit 0 reserved */
|
||||
ALTERNATE_FUNCTIONS(41, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO41 */
|
||||
ALTERNATE_FUNCTIONS(42, 1, UNUSED, UNUSED, 0, 0, 0), /* GPIO42, altA controlled by bit 1 */
|
||||
ALTERNATE_FUNCTIONS(43, 2, UNUSED, UNUSED, 0, 0, 0), /* GPIO43, altA controlled by bit 2 */
|
||||
ALTERNATE_FUNCTIONS(44, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO44, altA controlled by bit 3 */
|
||||
ALTERNATE_FUNCTIONS(45, 4, UNUSED, UNUSED, 0, 0, 0), /* GPIO45, altA controlled by bit 4 */
|
||||
ALTERNATE_FUNCTIONS(46, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO46, altA controlled by bit 5 */
|
||||
ALTERNATE_FUNCTIONS(47, 6, UNUSED, UNUSED, 0, 0, 0), /* GPIO47, altA controlled by bit 6 */
|
||||
ALTERNATE_FUNCTIONS(48, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO48, altA controlled by bit 7 */
|
||||
/* GPIOSEL7 - bit 0-1 reserved */
|
||||
ALTERNATE_FUNCTIONS(49, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO49 */
|
||||
ALTERNATE_FUNCTIONS(50, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO50 */
|
||||
ALTERNATE_FUNCTIONS(51, 2, UNUSED, UNUSED, 0, 0, 0), /* GPIO51, altA controlled by bit 2 */
|
||||
ALTERNATE_FUNCTIONS(52, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO52, altA controlled by bit 3 */
|
||||
ALTERNATE_FUNCTIONS(53, 4, UNUSED, UNUSED, 0, 0, 0), /* GPIO53, altA controlled by bit 4 */
|
||||
ALTERNATE_FUNCTIONS(54, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO54, altA controlled by bit 5 */
|
||||
ALTERNATE_FUNCTIONS(55, 6, UNUSED, UNUSED, 0, 0, 0), /* GPIO55, altA controlled by bit 6 */
|
||||
ALTERNATE_FUNCTIONS(56, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO56, altA controlled by bit 7 */
|
||||
};
|
||||
|
||||
static struct pullud ab8540_pullud = {
|
||||
.first_pin = 51, /* GPIO1_VBAT */
|
||||
.last_pin = 54, /* GPIO4_VBAT */
|
||||
};
|
||||
|
||||
/*
|
||||
* For AB8540 Only some GPIOs are interrupt capable:
|
||||
* GPIO43 to GPIO44
|
||||
* GPIO51 to GPIO54
|
||||
*/
|
||||
static struct abx500_gpio_irq_cluster ab8540_gpio_irq_cluster[] = {
|
||||
GPIO_IRQ_CLUSTER(43, 43, AB8540_INT_GPIO43F),
|
||||
GPIO_IRQ_CLUSTER(44, 44, AB8540_INT_GPIO44F),
|
||||
GPIO_IRQ_CLUSTER(51, 54, AB9540_INT_GPIO51R),
|
||||
};
|
||||
|
||||
static struct abx500_pinctrl_soc_data ab8540_soc = {
|
||||
.gpio_ranges = ab8540_pinranges,
|
||||
.gpio_num_ranges = ARRAY_SIZE(ab8540_pinranges),
|
||||
.pins = ab8540_pins,
|
||||
.npins = ARRAY_SIZE(ab8540_pins),
|
||||
.functions = ab8540_functions,
|
||||
.nfunctions = ARRAY_SIZE(ab8540_functions),
|
||||
.groups = ab8540_groups,
|
||||
.ngroups = ARRAY_SIZE(ab8540_groups),
|
||||
.alternate_functions = ab8540_alternate_functions,
|
||||
.pullud = &ab8540_pullud,
|
||||
.gpio_irq_cluster = ab8540_gpio_irq_cluster,
|
||||
.ngpio_irq_cluster = ARRAY_SIZE(ab8540_gpio_irq_cluster),
|
||||
.irq_gpio_rising_offset = AB8540_INT_GPIO43R,
|
||||
.irq_gpio_falling_offset = AB8540_INT_GPIO43F,
|
||||
.irq_gpio_factor = 2,
|
||||
};
|
||||
|
||||
void
|
||||
abx500_pinctrl_ab8540_init(struct abx500_pinctrl_soc_data **soc)
|
||||
{
|
||||
*soc = &ab8540_soc;
|
||||
}
|
||||
@ -1,486 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) ST-Ericsson SA 2012
|
||||
*
|
||||
* Author: Patrice Chotard <patrice.chotard@stericsson.com> for ST-Ericsson.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/pinctrl/pinctrl.h>
|
||||
#include <linux/mfd/abx500/ab8500.h>
|
||||
#include "pinctrl-abx500.h"
|
||||
|
||||
/* All the pins that can be used for GPIO and some other functions */
|
||||
#define ABX500_GPIO(offset) (offset)
|
||||
|
||||
#define AB9540_PIN_R4 ABX500_GPIO(1)
|
||||
#define AB9540_PIN_V3 ABX500_GPIO(2)
|
||||
#define AB9540_PIN_T4 ABX500_GPIO(3)
|
||||
#define AB9540_PIN_T5 ABX500_GPIO(4)
|
||||
/* hole */
|
||||
#define AB9540_PIN_B18 ABX500_GPIO(10)
|
||||
#define AB9540_PIN_C18 ABX500_GPIO(11)
|
||||
/* hole */
|
||||
#define AB9540_PIN_D18 ABX500_GPIO(13)
|
||||
#define AB9540_PIN_B19 ABX500_GPIO(14)
|
||||
#define AB9540_PIN_C19 ABX500_GPIO(15)
|
||||
#define AB9540_PIN_D19 ABX500_GPIO(16)
|
||||
#define AB9540_PIN_R3 ABX500_GPIO(17)
|
||||
#define AB9540_PIN_T2 ABX500_GPIO(18)
|
||||
#define AB9540_PIN_U2 ABX500_GPIO(19)
|
||||
#define AB9540_PIN_V2 ABX500_GPIO(20)
|
||||
#define AB9540_PIN_N17 ABX500_GPIO(21)
|
||||
#define AB9540_PIN_N16 ABX500_GPIO(22)
|
||||
#define AB9540_PIN_M19 ABX500_GPIO(23)
|
||||
#define AB9540_PIN_T3 ABX500_GPIO(24)
|
||||
#define AB9540_PIN_W2 ABX500_GPIO(25)
|
||||
/* hole */
|
||||
#define AB9540_PIN_H4 ABX500_GPIO(27)
|
||||
#define AB9540_PIN_F1 ABX500_GPIO(28)
|
||||
#define AB9540_PIN_F4 ABX500_GPIO(29)
|
||||
#define AB9540_PIN_F2 ABX500_GPIO(30)
|
||||
#define AB9540_PIN_E4 ABX500_GPIO(31)
|
||||
#define AB9540_PIN_F3 ABX500_GPIO(32)
|
||||
/* hole */
|
||||
#define AB9540_PIN_J13 ABX500_GPIO(34)
|
||||
/* hole */
|
||||
#define AB9540_PIN_L17 ABX500_GPIO(40)
|
||||
#define AB9540_PIN_L16 ABX500_GPIO(41)
|
||||
#define AB9540_PIN_W3 ABX500_GPIO(42)
|
||||
#define AB9540_PIN_N4 ABX500_GPIO(50)
|
||||
#define AB9540_PIN_G12 ABX500_GPIO(51)
|
||||
#define AB9540_PIN_E17 ABX500_GPIO(52)
|
||||
#define AB9540_PIN_D11 ABX500_GPIO(53)
|
||||
#define AB9540_PIN_M18 ABX500_GPIO(54)
|
||||
|
||||
/* indicates the highest GPIO number */
|
||||
#define AB9540_GPIO_MAX_NUMBER 54
|
||||
|
||||
/*
|
||||
* The names of the pins are denoted by GPIO number and ball name, even
|
||||
* though they can be used for other things than GPIO, this is the first
|
||||
* column in the table of the data sheet and often used on schematics and
|
||||
* such.
|
||||
*/
|
||||
static const struct pinctrl_pin_desc ab9540_pins[] = {
|
||||
PINCTRL_PIN(AB9540_PIN_R4, "GPIO1_R4"),
|
||||
PINCTRL_PIN(AB9540_PIN_V3, "GPIO2_V3"),
|
||||
PINCTRL_PIN(AB9540_PIN_T4, "GPIO3_T4"),
|
||||
PINCTRL_PIN(AB9540_PIN_T5, "GPIO4_T5"),
|
||||
/* hole */
|
||||
PINCTRL_PIN(AB9540_PIN_B18, "GPIO10_B18"),
|
||||
PINCTRL_PIN(AB9540_PIN_C18, "GPIO11_C18"),
|
||||
/* hole */
|
||||
PINCTRL_PIN(AB9540_PIN_D18, "GPIO13_D18"),
|
||||
PINCTRL_PIN(AB9540_PIN_B19, "GPIO14_B19"),
|
||||
PINCTRL_PIN(AB9540_PIN_C19, "GPIO15_C19"),
|
||||
PINCTRL_PIN(AB9540_PIN_D19, "GPIO16_D19"),
|
||||
PINCTRL_PIN(AB9540_PIN_R3, "GPIO17_R3"),
|
||||
PINCTRL_PIN(AB9540_PIN_T2, "GPIO18_T2"),
|
||||
PINCTRL_PIN(AB9540_PIN_U2, "GPIO19_U2"),
|
||||
PINCTRL_PIN(AB9540_PIN_V2, "GPIO20_V2"),
|
||||
PINCTRL_PIN(AB9540_PIN_N17, "GPIO21_N17"),
|
||||
PINCTRL_PIN(AB9540_PIN_N16, "GPIO22_N16"),
|
||||
PINCTRL_PIN(AB9540_PIN_M19, "GPIO23_M19"),
|
||||
PINCTRL_PIN(AB9540_PIN_T3, "GPIO24_T3"),
|
||||
PINCTRL_PIN(AB9540_PIN_W2, "GPIO25_W2"),
|
||||
/* hole */
|
||||
PINCTRL_PIN(AB9540_PIN_H4, "GPIO27_H4"),
|
||||
PINCTRL_PIN(AB9540_PIN_F1, "GPIO28_F1"),
|
||||
PINCTRL_PIN(AB9540_PIN_F4, "GPIO29_F4"),
|
||||
PINCTRL_PIN(AB9540_PIN_F2, "GPIO30_F2"),
|
||||
PINCTRL_PIN(AB9540_PIN_E4, "GPIO31_E4"),
|
||||
PINCTRL_PIN(AB9540_PIN_F3, "GPIO32_F3"),
|
||||
/* hole */
|
||||
PINCTRL_PIN(AB9540_PIN_J13, "GPIO34_J13"),
|
||||
/* hole */
|
||||
PINCTRL_PIN(AB9540_PIN_L17, "GPIO40_L17"),
|
||||
PINCTRL_PIN(AB9540_PIN_L16, "GPIO41_L16"),
|
||||
PINCTRL_PIN(AB9540_PIN_W3, "GPIO42_W3"),
|
||||
PINCTRL_PIN(AB9540_PIN_N4, "GPIO50_N4"),
|
||||
PINCTRL_PIN(AB9540_PIN_G12, "GPIO51_G12"),
|
||||
PINCTRL_PIN(AB9540_PIN_E17, "GPIO52_E17"),
|
||||
PINCTRL_PIN(AB9540_PIN_D11, "GPIO53_D11"),
|
||||
PINCTRL_PIN(AB9540_PIN_M18, "GPIO60_M18"),
|
||||
};
|
||||
|
||||
/*
|
||||
* Maps local GPIO offsets to local pin numbers
|
||||
*/
|
||||
static const struct abx500_pinrange ab9540_pinranges[] = {
|
||||
ABX500_PINRANGE(1, 4, ABX500_ALT_A),
|
||||
ABX500_PINRANGE(10, 2, ABX500_DEFAULT),
|
||||
ABX500_PINRANGE(13, 1, ABX500_DEFAULT),
|
||||
ABX500_PINRANGE(14, 12, ABX500_ALT_A),
|
||||
ABX500_PINRANGE(27, 6, ABX500_ALT_A),
|
||||
ABX500_PINRANGE(34, 1, ABX500_ALT_A),
|
||||
ABX500_PINRANGE(40, 3, ABX500_ALT_A),
|
||||
ABX500_PINRANGE(50, 1, ABX500_DEFAULT),
|
||||
ABX500_PINRANGE(51, 3, ABX500_ALT_A),
|
||||
ABX500_PINRANGE(54, 1, ABX500_DEFAULT),
|
||||
};
|
||||
|
||||
/*
|
||||
* Read the pin group names like this:
|
||||
* sysclkreq2_d_1 = first groups of pins for sysclkreq2 on default function
|
||||
*
|
||||
* The groups are arranged as sets per altfunction column, so we can
|
||||
* mux in one group at a time by selecting the same altfunction for them
|
||||
* all. When functions require pins on different altfunctions, you need
|
||||
* to combine several groups.
|
||||
*/
|
||||
|
||||
/* default column */
|
||||
static const unsigned sysclkreq2_d_1_pins[] = { AB9540_PIN_R4 };
|
||||
static const unsigned sysclkreq3_d_1_pins[] = { AB9540_PIN_V3 };
|
||||
static const unsigned sysclkreq4_d_1_pins[] = { AB9540_PIN_T4 };
|
||||
static const unsigned sysclkreq6_d_1_pins[] = { AB9540_PIN_T5 };
|
||||
static const unsigned gpio10_d_1_pins[] = { AB9540_PIN_B18 };
|
||||
static const unsigned gpio11_d_1_pins[] = { AB9540_PIN_C18 };
|
||||
static const unsigned gpio13_d_1_pins[] = { AB9540_PIN_D18 };
|
||||
static const unsigned pwmout1_d_1_pins[] = { AB9540_PIN_B19 };
|
||||
static const unsigned pwmout2_d_1_pins[] = { AB9540_PIN_C19 };
|
||||
static const unsigned pwmout3_d_1_pins[] = { AB9540_PIN_D19 };
|
||||
/* audio data interface 1*/
|
||||
static const unsigned adi1_d_1_pins[] = { AB9540_PIN_R3, AB9540_PIN_T2,
|
||||
AB9540_PIN_U2, AB9540_PIN_V2 };
|
||||
/* USBUICC */
|
||||
static const unsigned usbuicc_d_1_pins[] = { AB9540_PIN_N17, AB9540_PIN_N16,
|
||||
AB9540_PIN_M19 };
|
||||
static const unsigned sysclkreq7_d_1_pins[] = { AB9540_PIN_T3 };
|
||||
static const unsigned sysclkreq8_d_1_pins[] = { AB9540_PIN_W2 };
|
||||
/* Digital microphone 1 and 2 */
|
||||
static const unsigned dmic12_d_1_pins[] = { AB9540_PIN_H4, AB9540_PIN_F1 };
|
||||
/* Digital microphone 3 and 4 */
|
||||
static const unsigned dmic34_d_1_pins[] = { AB9540_PIN_F4, AB9540_PIN_F2 };
|
||||
/* Digital microphone 5 and 6 */
|
||||
static const unsigned dmic56_d_1_pins[] = { AB9540_PIN_E4, AB9540_PIN_F3 };
|
||||
static const unsigned extcpena_d_1_pins[] = { AB9540_PIN_J13 };
|
||||
/* modem SDA/SCL */
|
||||
static const unsigned modsclsda_d_1_pins[] = { AB9540_PIN_L17, AB9540_PIN_L16 };
|
||||
static const unsigned sysclkreq5_d_1_pins[] = { AB9540_PIN_W3 };
|
||||
static const unsigned gpio50_d_1_pins[] = { AB9540_PIN_N4 };
|
||||
static const unsigned batremn_d_1_pins[] = { AB9540_PIN_G12 };
|
||||
static const unsigned resethw_d_1_pins[] = { AB9540_PIN_E17 };
|
||||
static const unsigned service_d_1_pins[] = { AB9540_PIN_D11 };
|
||||
static const unsigned gpio60_d_1_pins[] = { AB9540_PIN_M18 };
|
||||
|
||||
/* Altfunction A column */
|
||||
static const unsigned gpio1_a_1_pins[] = { AB9540_PIN_R4 };
|
||||
static const unsigned gpio2_a_1_pins[] = { AB9540_PIN_V3 };
|
||||
static const unsigned gpio3_a_1_pins[] = { AB9540_PIN_T4 };
|
||||
static const unsigned gpio4_a_1_pins[] = { AB9540_PIN_T5 };
|
||||
static const unsigned hiqclkena_a_1_pins[] = { AB9540_PIN_B18 };
|
||||
static const unsigned pdmclk_a_1_pins[] = { AB9540_PIN_C18 };
|
||||
static const unsigned uartdata_a_1_pins[] = { AB9540_PIN_D18, AB9540_PIN_N4 };
|
||||
static const unsigned gpio14_a_1_pins[] = { AB9540_PIN_B19 };
|
||||
static const unsigned gpio15_a_1_pins[] = { AB9540_PIN_C19 };
|
||||
static const unsigned gpio16_a_1_pins[] = { AB9540_PIN_D19 };
|
||||
static const unsigned gpio17_a_1_pins[] = { AB9540_PIN_R3 };
|
||||
static const unsigned gpio18_a_1_pins[] = { AB9540_PIN_T2 };
|
||||
static const unsigned gpio19_a_1_pins[] = { AB9540_PIN_U2 };
|
||||
static const unsigned gpio20_a_1_pins[] = { AB9540_PIN_V2 };
|
||||
static const unsigned gpio21_a_1_pins[] = { AB9540_PIN_N17 };
|
||||
static const unsigned gpio22_a_1_pins[] = { AB9540_PIN_N16 };
|
||||
static const unsigned gpio23_a_1_pins[] = { AB9540_PIN_M19 };
|
||||
static const unsigned gpio24_a_1_pins[] = { AB9540_PIN_T3 };
|
||||
static const unsigned gpio25_a_1_pins[] = { AB9540_PIN_W2 };
|
||||
static const unsigned gpio27_a_1_pins[] = { AB9540_PIN_H4 };
|
||||
static const unsigned gpio28_a_1_pins[] = { AB9540_PIN_F1 };
|
||||
static const unsigned gpio29_a_1_pins[] = { AB9540_PIN_F4 };
|
||||
static const unsigned gpio30_a_1_pins[] = { AB9540_PIN_F2 };
|
||||
static const unsigned gpio31_a_1_pins[] = { AB9540_PIN_E4 };
|
||||
static const unsigned gpio32_a_1_pins[] = { AB9540_PIN_F3 };
|
||||
static const unsigned gpio34_a_1_pins[] = { AB9540_PIN_J13 };
|
||||
static const unsigned gpio40_a_1_pins[] = { AB9540_PIN_L17 };
|
||||
static const unsigned gpio41_a_1_pins[] = { AB9540_PIN_L16 };
|
||||
static const unsigned gpio42_a_1_pins[] = { AB9540_PIN_W3 };
|
||||
static const unsigned gpio51_a_1_pins[] = { AB9540_PIN_G12 };
|
||||
static const unsigned gpio52_a_1_pins[] = { AB9540_PIN_E17 };
|
||||
static const unsigned gpio53_a_1_pins[] = { AB9540_PIN_D11 };
|
||||
static const unsigned usbuiccpd_a_1_pins[] = { AB9540_PIN_M18 };
|
||||
|
||||
/* Altfunction B colum */
|
||||
static const unsigned pdmdata_b_1_pins[] = { AB9540_PIN_B18 };
|
||||
static const unsigned pwmextvibra1_b_1_pins[] = { AB9540_PIN_D18 };
|
||||
static const unsigned pwmextvibra2_b_1_pins[] = { AB9540_PIN_N4 };
|
||||
|
||||
/* Altfunction C column */
|
||||
static const unsigned usbvdat_c_1_pins[] = { AB9540_PIN_D18 };
|
||||
|
||||
#define AB9540_PIN_GROUP(a, b) { .name = #a, .pins = a##_pins, \
|
||||
.npins = ARRAY_SIZE(a##_pins), .altsetting = b }
|
||||
|
||||
static const struct abx500_pingroup ab9540_groups[] = {
|
||||
/* default column */
|
||||
AB9540_PIN_GROUP(sysclkreq2_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(sysclkreq3_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(sysclkreq4_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(sysclkreq6_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(gpio10_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(gpio11_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(gpio13_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(pwmout1_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(pwmout2_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(pwmout3_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(adi1_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(usbuicc_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(sysclkreq7_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(sysclkreq8_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(dmic12_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(dmic34_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(dmic56_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(extcpena_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(modsclsda_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(sysclkreq5_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(gpio50_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(batremn_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(resethw_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(service_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(gpio60_d_1, ABX500_DEFAULT),
|
||||
|
||||
/* Altfunction A column */
|
||||
AB9540_PIN_GROUP(gpio1_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio2_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio3_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio4_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(hiqclkena_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(pdmclk_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(uartdata_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio14_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio15_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio16_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio17_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio18_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio19_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio20_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio21_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio22_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio23_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio24_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio25_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio27_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio28_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio29_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio30_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio31_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio32_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio34_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio40_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio41_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio42_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio51_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio52_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio53_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(usbuiccpd_a_1, ABX500_ALT_A),
|
||||
|
||||
/* Altfunction B column */
|
||||
AB9540_PIN_GROUP(pdmdata_b_1, ABX500_ALT_B),
|
||||
AB9540_PIN_GROUP(pwmextvibra1_b_1, ABX500_ALT_B),
|
||||
AB9540_PIN_GROUP(pwmextvibra2_b_1, ABX500_ALT_B),
|
||||
|
||||
/* Altfunction C column */
|
||||
AB9540_PIN_GROUP(usbvdat_c_1, ABX500_ALT_C),
|
||||
};
|
||||
|
||||
/* We use this macro to define the groups applicable to a function */
|
||||
#define AB9540_FUNC_GROUPS(a, b...) \
|
||||
static const char * const a##_groups[] = { b };
|
||||
|
||||
AB9540_FUNC_GROUPS(sysclkreq, "sysclkreq2_d_1", "sysclkreq3_d_1",
|
||||
"sysclkreq4_d_1", "sysclkreq5_d_1", "sysclkreq6_d_1",
|
||||
"sysclkreq7_d_1", "sysclkreq8_d_1");
|
||||
AB9540_FUNC_GROUPS(gpio, "gpio1_a_1", "gpio2_a_1", "gpio3_a_1", "gpio4_a_1",
|
||||
"gpio10_d_1", "gpio11_d_1", "gpio13_d_1", "gpio14_a_1",
|
||||
"gpio15_a_1", "gpio16_a_1", "gpio17_a_1", "gpio18_a_1",
|
||||
"gpio19_a_1", "gpio20_a_1", "gpio21_a_1", "gpio22_a_1",
|
||||
"gpio23_a_1", "gpio24_a_1", "gpio25_a_1", "gpio27_a_1",
|
||||
"gpio28_a_1", "gpio29_a_1", "gpio30_a_1", "gpio31_a_1",
|
||||
"gpio32_a_1", "gpio34_a_1", "gpio40_a_1", "gpio41_a_1",
|
||||
"gpio42_a_1", "gpio50_d_1", "gpio51_a_1", "gpio52_a_1",
|
||||
"gpio53_a_1", "gpio60_d_1");
|
||||
AB9540_FUNC_GROUPS(pwmout, "pwmout1_d_1", "pwmout2_d_1", "pwmout3_d_1");
|
||||
AB9540_FUNC_GROUPS(adi1, "adi1_d_1");
|
||||
AB9540_FUNC_GROUPS(usbuicc, "usbuicc_d_1", "usbuiccpd_a_1");
|
||||
AB9540_FUNC_GROUPS(dmic, "dmic12_d_1", "dmic34_d_1", "dmic56_d_1");
|
||||
AB9540_FUNC_GROUPS(extcpena, "extcpena_d_1");
|
||||
AB9540_FUNC_GROUPS(modsclsda, "modsclsda_d_1");
|
||||
AB9540_FUNC_GROUPS(batremn, "batremn_d_1");
|
||||
AB9540_FUNC_GROUPS(resethw, "resethw_d_1");
|
||||
AB9540_FUNC_GROUPS(service, "service_d_1");
|
||||
AB9540_FUNC_GROUPS(hiqclkena, "hiqclkena_a_1");
|
||||
AB9540_FUNC_GROUPS(pdm, "pdmdata_b_1", "pdmclk_a_1");
|
||||
AB9540_FUNC_GROUPS(uartdata, "uartdata_a_1");
|
||||
AB9540_FUNC_GROUPS(pwmextvibra, "pwmextvibra1_b_1", "pwmextvibra2_b_1");
|
||||
AB9540_FUNC_GROUPS(usbvdat, "usbvdat_c_1");
|
||||
|
||||
#define FUNCTION(fname) \
|
||||
{ \
|
||||
.name = #fname, \
|
||||
.groups = fname##_groups, \
|
||||
.ngroups = ARRAY_SIZE(fname##_groups), \
|
||||
}
|
||||
|
||||
static const struct abx500_function ab9540_functions[] = {
|
||||
FUNCTION(sysclkreq),
|
||||
FUNCTION(gpio),
|
||||
FUNCTION(pwmout),
|
||||
FUNCTION(adi1),
|
||||
FUNCTION(usbuicc),
|
||||
FUNCTION(dmic),
|
||||
FUNCTION(extcpena),
|
||||
FUNCTION(modsclsda),
|
||||
FUNCTION(batremn),
|
||||
FUNCTION(resethw),
|
||||
FUNCTION(service),
|
||||
FUNCTION(hiqclkena),
|
||||
FUNCTION(pdm),
|
||||
FUNCTION(uartdata),
|
||||
FUNCTION(pwmextvibra),
|
||||
FUNCTION(usbvdat),
|
||||
};
|
||||
|
||||
/*
|
||||
* this table translates what's is in the AB9540 specification regarding the
|
||||
* balls alternate functions (as for DB, default, ALT_A, ALT_B and ALT_C).
|
||||
* ALTERNATE_FUNCTIONS(GPIO_NUMBER, GPIOSEL bit, ALTERNATFUNC bit1,
|
||||
* ALTERNATEFUNC bit2, ALTA val, ALTB val, ALTC val),
|
||||
*
|
||||
* example :
|
||||
*
|
||||
* ALTERNATE_FUNCTIONS(13, 4, 3, 4, 1, 0, 2),
|
||||
* means that pin AB9540_PIN_D18 (pin 13) supports 4 mux (default/ALT_A,
|
||||
* ALT_B and ALT_C), so GPIOSEL and ALTERNATFUNC registers are used to
|
||||
* select the mux. ALTA, ALTB and ALTC val indicates values to write in
|
||||
* ALTERNATFUNC register. We need to specifies these values as SOC
|
||||
* designers didn't apply the same logic on how to select mux in the
|
||||
* ABx500 family.
|
||||
*
|
||||
* As this pins supports at least ALT_B mux, default mux is
|
||||
* selected by writing 1 in GPIOSEL bit :
|
||||
*
|
||||
* | GPIOSEL bit=4 | alternatfunc bit2=4 | alternatfunc bit1=3
|
||||
* default | 1 | 0 | 0
|
||||
* alt_A | 0 | 0 | 1
|
||||
* alt_B | 0 | 0 | 0
|
||||
* alt_C | 0 | 1 | 0
|
||||
*
|
||||
* ALTERNATE_FUNCTIONS(1, 0, UNUSED, UNUSED),
|
||||
* means that pin AB9540_PIN_R4 (pin 1) supports 2 mux, so only GPIOSEL
|
||||
* register is used to select the mux. As this pins doesn't support at
|
||||
* least ALT_B mux, default mux is by writing 0 in GPIOSEL bit :
|
||||
*
|
||||
* | GPIOSEL bit=0 | alternatfunc bit2= | alternatfunc bit1=
|
||||
* default | 0 | 0 | 0
|
||||
* alt_A | 1 | 0 | 0
|
||||
*/
|
||||
|
||||
static struct
|
||||
alternate_functions ab9540alternate_functions[AB9540_GPIO_MAX_NUMBER + 1] = {
|
||||
/* GPIOSEL1 - bits 4-7 are reserved */
|
||||
ALTERNATE_FUNCTIONS(0, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO0 */
|
||||
ALTERNATE_FUNCTIONS(1, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO1, altA controlled by bit 0 */
|
||||
ALTERNATE_FUNCTIONS(2, 1, UNUSED, UNUSED, 0, 0, 0), /* GPIO2, altA controlled by bit 1 */
|
||||
ALTERNATE_FUNCTIONS(3, 2, UNUSED, UNUSED, 0, 0, 0), /* GPIO3, altA controlled by bit 2*/
|
||||
ALTERNATE_FUNCTIONS(4, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO4, altA controlled by bit 3*/
|
||||
ALTERNATE_FUNCTIONS(5, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO5 */
|
||||
ALTERNATE_FUNCTIONS(6, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO6 */
|
||||
ALTERNATE_FUNCTIONS(7, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO7 */
|
||||
ALTERNATE_FUNCTIONS(8, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO8 */
|
||||
/* GPIOSEL2 - bits 0 and 3 are reserved */
|
||||
ALTERNATE_FUNCTIONS(9, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO9 */
|
||||
ALTERNATE_FUNCTIONS(10, 1, 0, UNUSED, 1, 0, 0), /* GPIO10, altA and altB controlled by bit 0 */
|
||||
ALTERNATE_FUNCTIONS(11, 2, 1, UNUSED, 0, 0, 0), /* GPIO11, altA controlled by bit 1 */
|
||||
ALTERNATE_FUNCTIONS(12, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO12 */
|
||||
ALTERNATE_FUNCTIONS(13, 4, 3, 4, 1, 0, 2), /* GPIO13, altA altB and altC controlled by bit 3 and 4 */
|
||||
ALTERNATE_FUNCTIONS(14, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO14, altA controlled by bit 5 */
|
||||
ALTERNATE_FUNCTIONS(15, 6, UNUSED, UNUSED, 0, 0, 0), /* GPIO15, altA controlled by bit 6 */
|
||||
ALTERNATE_FUNCTIONS(16, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO16, altA controlled by bit 7 */
|
||||
/* GPIOSEL3 - bit 1-3 reserved
|
||||
* pins 17 to 20 are special case, only bit 0 is used to select
|
||||
* alternate function for these 4 pins.
|
||||
* bits 1 to 3 are reserved
|
||||
*/
|
||||
ALTERNATE_FUNCTIONS(17, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO17, altA controlled by bit 0 */
|
||||
ALTERNATE_FUNCTIONS(18, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO18, altA controlled by bit 0 */
|
||||
ALTERNATE_FUNCTIONS(19, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO19, altA controlled by bit 0 */
|
||||
ALTERNATE_FUNCTIONS(20, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO20, altA controlled by bit 0 */
|
||||
ALTERNATE_FUNCTIONS(21, 4, UNUSED, UNUSED, 0, 0, 0), /* GPIO21, altA controlled by bit 4 */
|
||||
ALTERNATE_FUNCTIONS(22, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO22, altA controlled by bit 5 */
|
||||
ALTERNATE_FUNCTIONS(23, 6, UNUSED, UNUSED, 0, 0, 0), /* GPIO23, altA controlled by bit 6 */
|
||||
ALTERNATE_FUNCTIONS(24, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO24, altA controlled by bit 7 */
|
||||
/* GPIOSEL4 - bit 1 reserved */
|
||||
ALTERNATE_FUNCTIONS(25, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO25, altA controlled by bit 0 */
|
||||
ALTERNATE_FUNCTIONS(26, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO26 */
|
||||
ALTERNATE_FUNCTIONS(27, 2, UNUSED, UNUSED, 0, 0, 0), /* GPIO27, altA controlled by bit 2 */
|
||||
ALTERNATE_FUNCTIONS(28, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO28, altA controlled by bit 3 */
|
||||
ALTERNATE_FUNCTIONS(29, 4, UNUSED, UNUSED, 0, 0, 0), /* GPIO29, altA controlled by bit 4 */
|
||||
ALTERNATE_FUNCTIONS(30, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO30, altA controlled by bit 5 */
|
||||
ALTERNATE_FUNCTIONS(31, 6, UNUSED, UNUSED, 0, 0, 0), /* GPIO31, altA controlled by bit 6 */
|
||||
ALTERNATE_FUNCTIONS(32, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO32, altA controlled by bit 7 */
|
||||
/* GPIOSEL5 - bit 0, 2-6 are reserved */
|
||||
ALTERNATE_FUNCTIONS(33, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO33 */
|
||||
ALTERNATE_FUNCTIONS(34, 1, UNUSED, UNUSED, 0, 0, 0), /* GPIO34, altA controlled by bit 1 */
|
||||
ALTERNATE_FUNCTIONS(35, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO35 */
|
||||
ALTERNATE_FUNCTIONS(36, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO36 */
|
||||
ALTERNATE_FUNCTIONS(37, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO37 */
|
||||
ALTERNATE_FUNCTIONS(38, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO38 */
|
||||
ALTERNATE_FUNCTIONS(39, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO39 */
|
||||
ALTERNATE_FUNCTIONS(40, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO40, altA controlled by bit 7 */
|
||||
/* GPIOSEL6 - bit 2-7 are reserved */
|
||||
ALTERNATE_FUNCTIONS(41, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO41, altA controlled by bit 0 */
|
||||
ALTERNATE_FUNCTIONS(42, 1, UNUSED, UNUSED, 0, 0, 0), /* GPIO42, altA controlled by bit 1 */
|
||||
ALTERNATE_FUNCTIONS(43, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO43 */
|
||||
ALTERNATE_FUNCTIONS(44, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO44 */
|
||||
ALTERNATE_FUNCTIONS(45, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO45 */
|
||||
ALTERNATE_FUNCTIONS(46, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO46 */
|
||||
ALTERNATE_FUNCTIONS(47, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO47 */
|
||||
ALTERNATE_FUNCTIONS(48, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO48 */
|
||||
/*
|
||||
* GPIOSEL7 - bit 0 and 6-7 are reserved
|
||||
* special case with GPIO60, wich is located at offset 5 of gpiosel7
|
||||
* don't know why it has been called GPIO60 in AB9540 datasheet,
|
||||
* GPIO54 would be logical..., so at SOC point of view we consider
|
||||
* GPIO60 = GPIO54
|
||||
*/
|
||||
ALTERNATE_FUNCTIONS(49, 0, UNUSED, UNUSED, 0, 0, 0), /* no GPIO49 */
|
||||
ALTERNATE_FUNCTIONS(50, 1, 2, UNUSED, 1, 0, 0), /* GPIO50, altA and altB controlled by bit 1 */
|
||||
ALTERNATE_FUNCTIONS(51, 2, UNUSED, UNUSED, 0, 0, 0), /* GPIO51, altA controlled by bit 2 */
|
||||
ALTERNATE_FUNCTIONS(52, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO52, altA controlled by bit 3 */
|
||||
ALTERNATE_FUNCTIONS(53, 4, UNUSED, UNUSED, 0, 0, 0), /* GPIO53, altA controlled by bit 4 */
|
||||
ALTERNATE_FUNCTIONS(54, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO54 = GPIO60, altA controlled by bit 5 */
|
||||
};
|
||||
|
||||
static struct abx500_gpio_irq_cluster ab9540_gpio_irq_cluster[] = {
|
||||
GPIO_IRQ_CLUSTER(10, 13, AB8500_INT_GPIO10R),
|
||||
GPIO_IRQ_CLUSTER(24, 25, AB8500_INT_GPIO24R),
|
||||
GPIO_IRQ_CLUSTER(40, 41, AB8500_INT_GPIO40R),
|
||||
GPIO_IRQ_CLUSTER(50, 54, AB9540_INT_GPIO50R),
|
||||
};
|
||||
|
||||
static struct abx500_pinctrl_soc_data ab9540_soc = {
|
||||
.gpio_ranges = ab9540_pinranges,
|
||||
.gpio_num_ranges = ARRAY_SIZE(ab9540_pinranges),
|
||||
.pins = ab9540_pins,
|
||||
.npins = ARRAY_SIZE(ab9540_pins),
|
||||
.functions = ab9540_functions,
|
||||
.nfunctions = ARRAY_SIZE(ab9540_functions),
|
||||
.groups = ab9540_groups,
|
||||
.ngroups = ARRAY_SIZE(ab9540_groups),
|
||||
.alternate_functions = ab9540alternate_functions,
|
||||
.gpio_irq_cluster = ab9540_gpio_irq_cluster,
|
||||
.ngpio_irq_cluster = ARRAY_SIZE(ab9540_gpio_irq_cluster),
|
||||
.irq_gpio_rising_offset = AB8500_INT_GPIO6R,
|
||||
.irq_gpio_falling_offset = AB8500_INT_GPIO6F,
|
||||
.irq_gpio_factor = 1,
|
||||
};
|
||||
|
||||
void
|
||||
abx500_pinctrl_ab9540_init(struct abx500_pinctrl_soc_data **soc)
|
||||
{
|
||||
*soc = &ab9540_soc;
|
||||
}
|
||||
@ -37,15 +37,6 @@
|
||||
#include "../pinconf.h"
|
||||
#include "../pinctrl-utils.h"
|
||||
|
||||
/*
|
||||
* The AB9540 and AB8540 GPIO support are extended versions
|
||||
* of the AB8500 GPIO support.
|
||||
* The AB9540 supports an additional (7th) register so that
|
||||
* more GPIO may be configured and used.
|
||||
* The AB8540 supports 4 new gpios (GPIOx_VBAT) that have
|
||||
* internal pull-up and pull-down capabilities.
|
||||
*/
|
||||
|
||||
/*
|
||||
* GPIO registers offset
|
||||
* Bank: 0x10
|
||||
@ -56,7 +47,6 @@
|
||||
#define AB8500_GPIO_SEL4_REG 0x03
|
||||
#define AB8500_GPIO_SEL5_REG 0x04
|
||||
#define AB8500_GPIO_SEL6_REG 0x05
|
||||
#define AB9540_GPIO_SEL7_REG 0x06
|
||||
|
||||
#define AB8500_GPIO_DIR1_REG 0x10
|
||||
#define AB8500_GPIO_DIR2_REG 0x11
|
||||
@ -64,7 +54,6 @@
|
||||
#define AB8500_GPIO_DIR4_REG 0x13
|
||||
#define AB8500_GPIO_DIR5_REG 0x14
|
||||
#define AB8500_GPIO_DIR6_REG 0x15
|
||||
#define AB9540_GPIO_DIR7_REG 0x16
|
||||
|
||||
#define AB8500_GPIO_OUT1_REG 0x20
|
||||
#define AB8500_GPIO_OUT2_REG 0x21
|
||||
@ -72,7 +61,6 @@
|
||||
#define AB8500_GPIO_OUT4_REG 0x23
|
||||
#define AB8500_GPIO_OUT5_REG 0x24
|
||||
#define AB8500_GPIO_OUT6_REG 0x25
|
||||
#define AB9540_GPIO_OUT7_REG 0x26
|
||||
|
||||
#define AB8500_GPIO_PUD1_REG 0x30
|
||||
#define AB8500_GPIO_PUD2_REG 0x31
|
||||
@ -80,7 +68,6 @@
|
||||
#define AB8500_GPIO_PUD4_REG 0x33
|
||||
#define AB8500_GPIO_PUD5_REG 0x34
|
||||
#define AB8500_GPIO_PUD6_REG 0x35
|
||||
#define AB9540_GPIO_PUD7_REG 0x36
|
||||
|
||||
#define AB8500_GPIO_IN1_REG 0x40
|
||||
#define AB8500_GPIO_IN2_REG 0x41
|
||||
@ -88,14 +75,7 @@
|
||||
#define AB8500_GPIO_IN4_REG 0x43
|
||||
#define AB8500_GPIO_IN5_REG 0x44
|
||||
#define AB8500_GPIO_IN6_REG 0x45
|
||||
#define AB9540_GPIO_IN7_REG 0x46
|
||||
#define AB8540_GPIO_VINSEL_REG 0x47
|
||||
#define AB8540_GPIO_PULL_UPDOWN_REG 0x48
|
||||
#define AB8500_GPIO_ALTFUN_REG 0x50
|
||||
#define AB8540_GPIO_PULL_UPDOWN_MASK 0x03
|
||||
#define AB8540_GPIO_VINSEL_MASK 0x03
|
||||
#define AB8540_GPIOX_VBAT_START 51
|
||||
#define AB8540_GPIOX_VBAT_END 54
|
||||
|
||||
#define ABX500_GPIO_INPUT 0
|
||||
#define ABX500_GPIO_OUTPUT 1
|
||||
@ -192,94 +172,11 @@ static void abx500_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
|
||||
dev_err(pct->dev, "%s write failed (%d)\n", __func__, ret);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
static int abx500_get_pull_updown(struct abx500_pinctrl *pct, int offset,
|
||||
enum abx500_gpio_pull_updown *pull_updown)
|
||||
{
|
||||
u8 pos;
|
||||
u8 val;
|
||||
int ret;
|
||||
struct pullud *pullud;
|
||||
|
||||
if (!pct->soc->pullud) {
|
||||
dev_err(pct->dev, "%s AB chip doesn't support pull up/down feature",
|
||||
__func__);
|
||||
ret = -EPERM;
|
||||
goto out;
|
||||
}
|
||||
|
||||
pullud = pct->soc->pullud;
|
||||
|
||||
if ((offset < pullud->first_pin)
|
||||
|| (offset > pullud->last_pin)) {
|
||||
ret = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
|
||||
ret = abx500_get_register_interruptible(pct->dev,
|
||||
AB8500_MISC, AB8540_GPIO_PULL_UPDOWN_REG, &val);
|
||||
|
||||
pos = (offset - pullud->first_pin) << 1;
|
||||
*pull_updown = (val >> pos) & AB8540_GPIO_PULL_UPDOWN_MASK;
|
||||
|
||||
out:
|
||||
if (ret < 0)
|
||||
dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
|
||||
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int abx500_set_pull_updown(struct abx500_pinctrl *pct,
|
||||
int offset, enum abx500_gpio_pull_updown val)
|
||||
{
|
||||
u8 pos;
|
||||
int ret;
|
||||
struct pullud *pullud;
|
||||
|
||||
if (!pct->soc->pullud) {
|
||||
dev_err(pct->dev, "%s AB chip doesn't support pull up/down feature",
|
||||
__func__);
|
||||
ret = -EPERM;
|
||||
goto out;
|
||||
}
|
||||
|
||||
pullud = pct->soc->pullud;
|
||||
|
||||
if ((offset < pullud->first_pin)
|
||||
|| (offset > pullud->last_pin)) {
|
||||
ret = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
pos = (offset - pullud->first_pin) << 1;
|
||||
|
||||
ret = abx500_mask_and_set_register_interruptible(pct->dev,
|
||||
AB8500_MISC, AB8540_GPIO_PULL_UPDOWN_REG,
|
||||
AB8540_GPIO_PULL_UPDOWN_MASK << pos, val << pos);
|
||||
|
||||
out:
|
||||
if (ret < 0)
|
||||
dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static bool abx500_pullud_supported(struct gpio_chip *chip, unsigned gpio)
|
||||
{
|
||||
struct abx500_pinctrl *pct = gpiochip_get_data(chip);
|
||||
struct pullud *pullud = pct->soc->pullud;
|
||||
|
||||
return (pullud &&
|
||||
gpio >= pullud->first_pin &&
|
||||
gpio <= pullud->last_pin);
|
||||
}
|
||||
|
||||
static int abx500_gpio_direction_output(struct gpio_chip *chip,
|
||||
unsigned offset,
|
||||
int val)
|
||||
{
|
||||
struct abx500_pinctrl *pct = gpiochip_get_data(chip);
|
||||
unsigned gpio;
|
||||
int ret;
|
||||
|
||||
/* set direction as output */
|
||||
@ -295,16 +192,7 @@ static int abx500_gpio_direction_output(struct gpio_chip *chip,
|
||||
AB8500_GPIO_PUD1_REG,
|
||||
offset,
|
||||
ABX500_GPIO_PULL_NONE);
|
||||
if (ret < 0)
|
||||
goto out;
|
||||
|
||||
/* if supported, disable both pull down and pull up */
|
||||
gpio = offset + 1;
|
||||
if (abx500_pullud_supported(chip, gpio)) {
|
||||
ret = abx500_set_pull_updown(pct,
|
||||
gpio,
|
||||
ABX500_GPIO_PULL_NONE);
|
||||
}
|
||||
out:
|
||||
if (ret < 0) {
|
||||
dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
|
||||
@ -570,7 +458,6 @@ static void abx500_gpio_dbg_show_one(struct seq_file *s,
|
||||
int mode = -1;
|
||||
bool is_out;
|
||||
bool pd;
|
||||
enum abx500_gpio_pull_updown pud = 0;
|
||||
int ret;
|
||||
|
||||
const char *modes[] = {
|
||||
@ -597,20 +484,12 @@ static void abx500_gpio_dbg_show_one(struct seq_file *s,
|
||||
is_out ? "out" : "in ");
|
||||
|
||||
if (!is_out) {
|
||||
if (abx500_pullud_supported(chip, offset)) {
|
||||
ret = abx500_get_pull_updown(pct, offset, &pud);
|
||||
if (ret < 0)
|
||||
goto out;
|
||||
ret = abx500_gpio_get_bit(chip, AB8500_GPIO_PUD1_REG,
|
||||
gpio_offset, &pd);
|
||||
if (ret < 0)
|
||||
goto out;
|
||||
|
||||
seq_printf(s, " %-9s", pull_up_down[pud]);
|
||||
} else {
|
||||
ret = abx500_gpio_get_bit(chip, AB8500_GPIO_PUD1_REG,
|
||||
gpio_offset, &pd);
|
||||
if (ret < 0)
|
||||
goto out;
|
||||
|
||||
seq_printf(s, " %-9s", pull_up_down[pd]);
|
||||
}
|
||||
seq_printf(s, " %-9s", pull_up_down[pd]);
|
||||
} else
|
||||
seq_printf(s, " %-9s", chip->get(chip, offset) ? "hi" : "lo");
|
||||
|
||||
@ -994,23 +873,11 @@ static int abx500_pin_config_set(struct pinctrl_dev *pctldev,
|
||||
ret = abx500_gpio_direction_input(chip, offset);
|
||||
if (ret < 0)
|
||||
goto out;
|
||||
/*
|
||||
* Some chips only support pull down, while some
|
||||
* actually support both pull up and pull down. Such
|
||||
* chips have a "pullud" range specified for the pins
|
||||
* that support both features. If the pin is not
|
||||
* within that range, we fall back to the old bit set
|
||||
* that only support pull down.
|
||||
*/
|
||||
if (abx500_pullud_supported(chip, pin))
|
||||
ret = abx500_set_pull_updown(pct,
|
||||
pin,
|
||||
ABX500_GPIO_PULL_NONE);
|
||||
else
|
||||
/* Chip only supports pull down */
|
||||
ret = abx500_gpio_set_bits(chip,
|
||||
AB8500_GPIO_PUD1_REG, offset,
|
||||
ABX500_GPIO_PULL_NONE);
|
||||
|
||||
/* Chip only supports pull down */
|
||||
ret = abx500_gpio_set_bits(chip,
|
||||
AB8500_GPIO_PUD1_REG, offset,
|
||||
ABX500_GPIO_PULL_NONE);
|
||||
break;
|
||||
|
||||
case PIN_CONFIG_BIAS_PULL_DOWN:
|
||||
@ -1020,25 +887,13 @@ static int abx500_pin_config_set(struct pinctrl_dev *pctldev,
|
||||
/*
|
||||
* if argument = 1 set the pull down
|
||||
* else clear the pull down
|
||||
* Some chips only support pull down, while some
|
||||
* actually support both pull up and pull down. Such
|
||||
* chips have a "pullud" range specified for the pins
|
||||
* that support both features. If the pin is not
|
||||
* within that range, we fall back to the old bit set
|
||||
* that only support pull down.
|
||||
* Chip only supports pull down
|
||||
*/
|
||||
if (abx500_pullud_supported(chip, pin))
|
||||
ret = abx500_set_pull_updown(pct,
|
||||
pin,
|
||||
argument ? ABX500_GPIO_PULL_DOWN :
|
||||
ABX500_GPIO_PULL_NONE);
|
||||
else
|
||||
/* Chip only supports pull down */
|
||||
ret = abx500_gpio_set_bits(chip,
|
||||
AB8500_GPIO_PUD1_REG,
|
||||
offset,
|
||||
argument ? ABX500_GPIO_PULL_DOWN :
|
||||
ABX500_GPIO_PULL_NONE);
|
||||
ret = abx500_gpio_set_bits(chip,
|
||||
AB8500_GPIO_PUD1_REG,
|
||||
offset,
|
||||
argument ? ABX500_GPIO_PULL_DOWN :
|
||||
ABX500_GPIO_PULL_NONE);
|
||||
break;
|
||||
|
||||
case PIN_CONFIG_BIAS_PULL_UP:
|
||||
@ -1050,18 +905,6 @@ static int abx500_pin_config_set(struct pinctrl_dev *pctldev,
|
||||
* else clear the pull up
|
||||
*/
|
||||
ret = abx500_gpio_direction_input(chip, offset);
|
||||
/*
|
||||
* Some chips only support pull down, while some
|
||||
* actually support both pull up and pull down. Such
|
||||
* chips have a "pullud" range specified for the pins
|
||||
* that support both features. If the pin is not
|
||||
* within that range, do nothing
|
||||
*/
|
||||
if (abx500_pullud_supported(chip, pin))
|
||||
ret = abx500_set_pull_updown(pct,
|
||||
pin,
|
||||
argument ? ABX500_GPIO_PULL_UP :
|
||||
ABX500_GPIO_PULL_NONE);
|
||||
break;
|
||||
|
||||
case PIN_CONFIG_OUTPUT:
|
||||
@ -1136,8 +979,6 @@ static int abx500_get_gpio_num(struct abx500_pinctrl_soc_data *soc)
|
||||
static const struct of_device_id abx500_gpio_match[] = {
|
||||
{ .compatible = "stericsson,ab8500-gpio", .data = (void *)PINCTRL_AB8500, },
|
||||
{ .compatible = "stericsson,ab8505-gpio", .data = (void *)PINCTRL_AB8505, },
|
||||
{ .compatible = "stericsson,ab8540-gpio", .data = (void *)PINCTRL_AB8540, },
|
||||
{ .compatible = "stericsson,ab9540-gpio", .data = (void *)PINCTRL_AB9540, },
|
||||
{ }
|
||||
};
|
||||
|
||||
@ -1177,12 +1018,6 @@ static int abx500_gpio_probe(struct platform_device *pdev)
|
||||
case PINCTRL_AB8500:
|
||||
abx500_pinctrl_ab8500_init(&pct->soc);
|
||||
break;
|
||||
case PINCTRL_AB8540:
|
||||
abx500_pinctrl_ab8540_init(&pct->soc);
|
||||
break;
|
||||
case PINCTRL_AB9540:
|
||||
abx500_pinctrl_ab9540_init(&pct->soc);
|
||||
break;
|
||||
case PINCTRL_AB8505:
|
||||
abx500_pinctrl_ab8505_init(&pct->soc);
|
||||
break;
|
||||
|
||||
@ -4,9 +4,7 @@
|
||||
|
||||
/* Package definitions */
|
||||
#define PINCTRL_AB8500 0
|
||||
#define PINCTRL_AB8540 1
|
||||
#define PINCTRL_AB9540 2
|
||||
#define PINCTRL_AB8505 3
|
||||
#define PINCTRL_AB8505 1
|
||||
|
||||
/* pins alternate function */
|
||||
enum abx500_pin_func {
|
||||
@ -96,17 +94,6 @@ struct alternate_functions {
|
||||
u8 altc_val;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct pullud - specific pull up/down feature
|
||||
* @first_pin: The pin number of the first pins which support
|
||||
* specific pull up/down
|
||||
* @last_pin: The pin number of the last pins
|
||||
*/
|
||||
struct pullud {
|
||||
unsigned first_pin;
|
||||
unsigned last_pin;
|
||||
};
|
||||
|
||||
#define GPIO_IRQ_CLUSTER(a, b, c) \
|
||||
{ \
|
||||
.start = a, \
|
||||
@ -162,8 +149,6 @@ struct abx500_pinrange {
|
||||
* @ngroups: The number of entries in @groups.
|
||||
* @alternate_functions: array describing pins which supports alternate and
|
||||
* how to set it.
|
||||
* @pullud: array describing pins which supports pull up/down
|
||||
* specific registers.
|
||||
* @gpio_irq_cluster: An array of GPIO interrupt capable for this SoC
|
||||
* @ngpio_irq_cluster: The number of GPIO inetrrupt capable for this SoC
|
||||
* @irq_gpio_rising_offset: Interrupt offset used as base to compute specific
|
||||
@ -184,7 +169,6 @@ struct abx500_pinctrl_soc_data {
|
||||
const struct abx500_pingroup *groups;
|
||||
unsigned ngroups;
|
||||
struct alternate_functions *alternate_functions;
|
||||
struct pullud *pullud;
|
||||
struct abx500_gpio_irq_cluster *gpio_irq_cluster;
|
||||
unsigned ngpio_irq_cluster;
|
||||
int irq_gpio_rising_offset;
|
||||
@ -205,32 +189,6 @@ abx500_pinctrl_ab8500_init(struct abx500_pinctrl_soc_data **soc)
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PINCTRL_AB8540
|
||||
|
||||
void abx500_pinctrl_ab8540_init(struct abx500_pinctrl_soc_data **soc);
|
||||
|
||||
#else
|
||||
|
||||
static inline void
|
||||
abx500_pinctrl_ab8540_init(struct abx500_pinctrl_soc_data **soc)
|
||||
{
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PINCTRL_AB9540
|
||||
|
||||
void abx500_pinctrl_ab9540_init(struct abx500_pinctrl_soc_data **soc);
|
||||
|
||||
#else
|
||||
|
||||
static inline void
|
||||
abx500_pinctrl_ab9540_init(struct abx500_pinctrl_soc_data **soc)
|
||||
{
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PINCTRL_AB8505
|
||||
|
||||
void abx500_pinctrl_ab8505_init(struct abx500_pinctrl_soc_data **soc);
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue
Block a user