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ARM: OMAP: timer: Wrap the inline functions under OMAP2PLUS define
Wrap the inline functions under OMAP2PLUS/OMAP1 defines. This patch also inlines omap_dm_timer_get_fclk function for non OMAP1 Config. Signed-off-by: Keerthy <j-keerthy@ti.com> Tested-by: Ladislav Michl <ladis@linux-mips.org> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -132,7 +132,16 @@ void omap_dm_timer_disable(struct omap_dm_timer *timer);
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int omap_dm_timer_get_irq(struct omap_dm_timer *timer);
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int omap_dm_timer_get_irq(struct omap_dm_timer *timer);
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u32 omap_dm_timer_modify_idlect_mask(u32 inputmask);
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u32 omap_dm_timer_modify_idlect_mask(u32 inputmask);
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#ifndef CONFIG_ARCH_OMAP1
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struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer);
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struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer);
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#else
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static inline
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struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
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{
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return NULL;
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}
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#endif
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int omap_dm_timer_trigger(struct omap_dm_timer *timer);
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int omap_dm_timer_trigger(struct omap_dm_timer *timer);
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int omap_dm_timer_start(struct omap_dm_timer *timer);
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int omap_dm_timer_start(struct omap_dm_timer *timer);
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@ -272,6 +281,12 @@ int omap_dm_timers_active(void);
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#define OMAP_TIMER_TICK_INT_MASK_COUNT_REG \
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#define OMAP_TIMER_TICK_INT_MASK_COUNT_REG \
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(_OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET | (WP_TOWR << WPSHIFT))
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(_OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET | (WP_TOWR << WPSHIFT))
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/*
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* The below are inlined to optimize code size for system timers. Other code
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* should not need these at all, see
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* include/linux/platform_data/pwm_omap_dmtimer.h
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*/
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#if defined(CONFIG_ARCH_OMAP1) || defined(CONFIG_ARCH_OMAP2PLUS)
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static inline u32 __omap_dm_timer_read(struct omap_dm_timer *timer, u32 reg,
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static inline u32 __omap_dm_timer_read(struct omap_dm_timer *timer, u32 reg,
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int posted)
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int posted)
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{
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{
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@ -410,5 +425,5 @@ static inline void __omap_dm_timer_write_status(struct omap_dm_timer *timer,
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{
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{
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writel_relaxed(value, timer->irq_stat);
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writel_relaxed(value, timer->irq_stat);
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}
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}
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#endif /* CONFIG_ARCH_OMAP1 || CONFIG_ARCH_OMAP2PLUS */
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#endif /* __ASM_ARCH_DMTIMER_H */
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#endif /* __ASM_ARCH_DMTIMER_H */
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