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gma500: The MID devices have the register offset different

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This is another small step towards getting Moorestown/Oaktrail support to
work but for Moorestown at least we still need to sort out GEM backed base
framebuffer, which means figuring out why GEM explodes early on at the
moment.

Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Alan Cox 2011-05-06 16:48:27 +01:00 committed by Greg Kroah-Hartman
parent 9fada0a0c5
commit b644c7ce18
1 changed files with 5 additions and 1 deletions
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6
drivers/staging/gma500/psb_drv.c
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@ -565,7 +565,11 @@ static int psb_driver_load(struct drm_device *dev, unsigned long chipset)
if (!dev_priv->vdc_reg)
goto out_err;
dev_priv->sgx_reg = ioremap(resource_start + PSB_SGX_OFFSET,
if (IS_MRST(dev))
dev_priv->sgx_reg = ioremap(resource_start + MRST_SGX_OFFSET,
PSB_SGX_SIZE);
else
dev_priv->sgx_reg = ioremap(resource_start + PSB_SGX_OFFSET,
PSB_SGX_SIZE);
if (!dev_priv->sgx_reg)