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Merge master.kernel.org:/home/rmk/linux-2.6-arm

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This commit is contained in:
Linus Torvalds 2005-11-06 16:58:11 -08:00
commit b54a063df4
14 changed files with 391 additions and 28 deletions
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7
Documentation/arm/README
View File

@ -8,10 +8,9 @@ Compilation of kernel
---------------------
In order to compile ARM Linux, you will need a compiler capable of
generating ARM ELF code with GNU extensions. GCC 2.95.1, EGCS
1.1.2, and GCC 3.3 are known to be good compilers. Fortunately, you
needn't guess. The kernel will report an error if your compiler is
a recognized offender.
generating ARM ELF code with GNU extensions. GCC 3.3 is known to be
a good compiler. Fortunately, you needn't guess. The kernel will report
an error if your compiler is a recognized offender.
To build ARM Linux natively, you shouldn't have to alter the ARCH = line
in the top level Makefile. However, if you don't have the ARM Linux ELF

5
MAINTAINERS
View File

@ -297,6 +297,11 @@ P: Richard Purdie
M: rpurdie@rpsys.net
S: Maintained
ARM/TOSA MACHINE SUPPORT
P: Dirk Opfer
M: dirk@opfer-online.de
S: Maintained
ARM/PLEB SUPPORT
P: Peter Chubb
M: pleb@gelato.unsw.edu.au

15
arch/arm/kernel/entry-armv.S
View File

@ -785,7 +785,7 @@ __kuser_helper_end:
* SP points to a minimal amount of processor-private memory, the address
* of which is copied into r0 for the mode specific abort handler.
*/
.macro vector_stub, name, correction=0
.macro vector_stub, name, mode, correction=0
.align 5
vector_\name:
@ -805,15 +805,14 @@ vector_\name:
@ Prepare for SVC32 mode. IRQs remain disabled.
@
mrs r0, cpsr
bic r0, r0, #MODE_MASK
orr r0, r0, #SVC_MODE
eor r0, r0, #(\mode ^ SVC_MODE)
msr spsr_cxsf, r0
@
@ the branch table must immediately follow this code
@
mov r0, sp
and lr, lr, #0x0f
mov r0, sp
ldr lr, [pc, lr, lsl #2]
movs pc, lr @ branch to handler in SVC mode
.endm
@ -823,7 +822,7 @@ __stubs_start:
/*
* Interrupt dispatcher
*/
vector_stub irq, 4
vector_stub irq, IRQ_MODE, 4
.long __irq_usr @ 0 (USR_26 / USR_32)
.long __irq_invalid @ 1 (FIQ_26 / FIQ_32)
@ -846,7 +845,7 @@ __stubs_start:
* Data abort dispatcher
* Enter in ABT mode, spsr = USR CPSR, lr = USR PC
*/
vector_stub dabt, 8
vector_stub dabt, ABT_MODE, 8
.long __dabt_usr @ 0 (USR_26 / USR_32)
.long __dabt_invalid @ 1 (FIQ_26 / FIQ_32)
@ -869,7 +868,7 @@ __stubs_start:
* Prefetch abort dispatcher
* Enter in ABT mode, spsr = USR CPSR, lr = USR PC
*/
vector_stub pabt, 4
vector_stub pabt, ABT_MODE, 4
.long __pabt_usr @ 0 (USR_26 / USR_32)
.long __pabt_invalid @ 1 (FIQ_26 / FIQ_32)
@ -892,7 +891,7 @@ __stubs_start:
* Undef instr entry dispatcher
* Enter in UND mode, spsr = SVC/USR CPSR, lr = SVC/USR PC
*/
vector_stub und
vector_stub und, UND_MODE
.long __und_usr @ 0 (USR_26 / USR_32)
.long __und_invalid @ 1 (FIQ_26 / FIQ_32)

10
arch/arm/kernel/setup.c
View File

@ -338,7 +338,8 @@ void cpu_init(void)
BUG();
}
dump_cpu_info(cpu);
if (system_state == SYSTEM_BOOTING)
dump_cpu_info(cpu);
/*
* setup stacks for re-entrant exception handlers
@ -838,7 +839,12 @@ static int c_show(struct seq_file *m, void *v)
#if defined(CONFIG_SMP)
for_each_online_cpu(i) {
seq_printf(m, "Processor\t: %d\n", i);
/*
* glibc reads /proc/cpuinfo to determine the number of
* online processors, looking for lines beginning with
* "processor". Give glibc what it expects.
*/
seq_printf(m, "processor\t: %d\n", i);
seq_printf(m, "BogoMIPS\t: %lu.%02lu\n\n",
per_cpu(cpu_data, i).loops_per_jiffy / (500000UL/HZ),
(per_cpu(cpu_data, i).loops_per_jiffy / (5000UL/HZ)) % 100);

11
arch/arm/mach-ixp2000/uengine.c
View File

@ -91,8 +91,8 @@ EXPORT_SYMBOL(ixp2000_uengine_csr_write);
void ixp2000_uengine_reset(u32 uengine_mask)
{
ixp2000_reg_write(IXP2000_RESET1, uengine_mask & ixp2000_uengine_mask);
ixp2000_reg_write(IXP2000_RESET1, 0);
ixp2000_reg_wrb(IXP2000_RESET1, uengine_mask & ixp2000_uengine_mask);
ixp2000_reg_wrb(IXP2000_RESET1, 0);
}
EXPORT_SYMBOL(ixp2000_uengine_reset);
@ -452,21 +452,20 @@ static int __init ixp2000_uengine_init(void)
/*
* Reset microengines.
*/
ixp2000_reg_write(IXP2000_RESET1, ixp2000_uengine_mask);
ixp2000_reg_write(IXP2000_RESET1, 0);
ixp2000_uengine_reset(ixp2000_uengine_mask);
/*
* Synchronise timestamp counters across all microengines.
*/
value = ixp2000_reg_read(IXP2000_MISC_CONTROL);
ixp2000_reg_write(IXP2000_MISC_CONTROL, value & ~0x80);
ixp2000_reg_wrb(IXP2000_MISC_CONTROL, value & ~0x80);
for (uengine = 0; uengine < 32; uengine++) {
if (ixp2000_uengine_mask & (1 << uengine)) {
ixp2000_uengine_csr_write(uengine, TIMESTAMP_LOW, 0);
ixp2000_uengine_csr_write(uengine, TIMESTAMP_HIGH, 0);
}
}
ixp2000_reg_write(IXP2000_MISC_CONTROL, value | 0x80);
ixp2000_reg_wrb(IXP2000_MISC_CONTROL, value | 0x80);
return 0;
}

2
arch/arm/mach-ixp4xx/common-pci.c
View File

@ -427,7 +427,7 @@ void __init ixp4xx_pci_preinit(void)
#ifdef __ARMEB__
*PCI_CSR = PCI_CSR_IC | PCI_CSR_ABE | PCI_CSR_PDS | PCI_CSR_ADS;
#else
*PCI_CSR = PCI_CSR_IC;
*PCI_CSR = PCI_CSR_IC | PCI_CSR_ABE;
#endif
pr_debug("DONE\n");

9
arch/arm/mach-pxa/Kconfig
View File

@ -27,7 +27,8 @@ config PXA_SHARPSL
Say Y here if you intend to run this kernel on a
Sharp Zaurus SL-5600 (Poodle), SL-C700 (Corgi),
SL-C750 (Shepherd), SL-C760 (Husky), SL-C1000 (Akita),
SL-C3000 (Spitz) or SL-C3100 (Borzoi) handheld computer.
SL-C3000 (Spitz), SL-C3100 (Borzoi) or SL-C6000x (Tosa)
handheld computer.
endchoice
@ -37,7 +38,7 @@ choice
prompt "Select target Sharp Zaurus device range"
config PXA_SHARPSL_25x
bool "Sharp PXA25x models (SL-5600 and SL-C7xx)"
bool "Sharp PXA25x models (SL-5600, SL-C7xx and SL-C6000x)"
select PXA25x
config PXA_SHARPSL_27x
@ -80,6 +81,10 @@ config MACH_BORZOI
depends PXA_SHARPSL_27x
select PXA_SHARP_Cxx00
config MACH_TOSA
bool "Enable Sharp SL-6000x (Tosa) Support"
depends PXA_SHARPSL
config PXA25x
bool
help

1
arch/arm/mach-pxa/Makefile
View File

@ -14,6 +14,7 @@ obj-$(CONFIG_ARCH_PXA_IDP) += idp.o
obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o corgi_ssp.o corgi_lcd.o ssp.o
obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o corgi_ssp.o corgi_lcd.o ssp.o
obj-$(CONFIG_MACH_POODLE) += poodle.o
obj-$(CONFIG_MACH_TOSA) += tosa.o
# Support for blinky lights
led-y := leds.o

16
arch/arm/mach-pxa/pm.c
View File

@ -12,6 +12,7 @@
*/
#include <linux/config.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/suspend.h>
#include <linux/errno.h>
#include <linux/time.h>
@ -19,6 +20,7 @@
#include <asm/hardware.h>
#include <asm/memory.h>
#include <asm/system.h>
#include <asm/arch/pm.h>
#include <asm/arch/pxa-regs.h>
#include <asm/arch/lubbock.h>
#include <asm/mach/time.h>
@ -72,7 +74,7 @@ enum { SLEEP_SAVE_START = 0,
};
static int pxa_pm_enter(suspend_state_t state)
int pxa_pm_enter(suspend_state_t state)
{
unsigned long sleep_save[SLEEP_SAVE_SIZE];
unsigned long checksum = 0;
@ -191,6 +193,8 @@ static int pxa_pm_enter(suspend_state_t state)
return 0;
}
EXPORT_SYMBOL_GPL(pxa_pm_enter);
unsigned long sleep_phys_sp(void *sp)
{
return virt_to_phys(sp);
@ -199,21 +203,25 @@ unsigned long sleep_phys_sp(void *sp)
/*
* Called after processes are frozen, but before we shut down devices.
*/
static int pxa_pm_prepare(suspend_state_t state)
int pxa_pm_prepare(suspend_state_t state)
{
extern int pxa_cpu_pm_prepare(suspend_state_t state);
return pxa_cpu_pm_prepare(state);
}
EXPORT_SYMBOL_GPL(pxa_pm_prepare);
/*
* Called after devices are re-setup, but before processes are thawed.
*/
static int pxa_pm_finish(suspend_state_t state)
int pxa_pm_finish(suspend_state_t state)
{
return 0;
}
EXPORT_SYMBOL_GPL(pxa_pm_finish);
/*
* Set to PM_DISK_FIRMWARE so we can quickly veto suspend-to-disk.
*/
@ -230,4 +238,4 @@ static int __init pxa_pm_init(void)
return 0;
}
late_initcall(pxa_pm_init);
device_initcall(pxa_pm_init);

162
arch/arm/mach-pxa/tosa.c Normal file
View File

@ -0,0 +1,162 @@
/*
* Support for Sharp SL-C6000x PDAs
* Model: (Tosa)
*
* Copyright (c) 2005 Dirk Opfer
*
* Based on code written by Sharp/Lineo for 2.4 kernels
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/major.h>
#include <linux/fs.h>
#include <linux/interrupt.h>
#include <linux/mmc/host.h>
#include <asm/setup.h>
#include <asm/memory.h>
#include <asm/mach-types.h>
#include <asm/hardware.h>
#include <asm/irq.h>
#include <asm/arch/irda.h>
#include <asm/arch/mmc.h>
#include <asm/arch/udc.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <asm/arch/pxa-regs.h>
#include <asm/arch/irq.h>
#include <asm/arch/tosa.h>
#include <asm/hardware/scoop.h>
#include <asm/mach/sharpsl_param.h>
#include "generic.h"
/*
* SCOOP Device
*/
static struct resource tosa_scoop_resources[] = {
[0] = {
.start = TOSA_CF_PHYS,
.end = TOSA_CF_PHYS + 0xfff,
.flags = IORESOURCE_MEM,
},
};
static struct scoop_config tosa_scoop_setup = {
.io_dir = TOSA_SCOOP_IO_DIR,
.io_out = TOSA_SCOOP_IO_OUT,
};
struct platform_device tosascoop_device = {
.name = "sharp-scoop",
.id = 0,
.dev = {
.platform_data = &tosa_scoop_setup,
},
.num_resources = ARRAY_SIZE(tosa_scoop_resources),
.resource = tosa_scoop_resources,
};
/*
* SCOOP Device Jacket
*/
static struct resource tosa_scoop_jc_resources[] = {
[0] = {
.start = TOSA_SCOOP_PHYS + 0x40,
.end = TOSA_SCOOP_PHYS + 0xfff,
.flags = IORESOURCE_MEM,
},
};
static struct scoop_config tosa_scoop_jc_setup = {
.io_dir = TOSA_SCOOP_JC_IO_DIR,
.io_out = TOSA_SCOOP_JC_IO_OUT,
};
struct platform_device tosascoop_jc_device = {
.name = "sharp-scoop",
.id = 1,
.dev = {
.platform_data = &tosa_scoop_jc_setup,
.parent = &tosascoop_device.dev,
},
.num_resources = ARRAY_SIZE(tosa_scoop_jc_resources),
.resource = tosa_scoop_jc_resources,
};
static struct scoop_pcmcia_dev tosa_pcmcia_scoop[] = {
{
.dev = &tosascoop_device.dev,
.irq = TOSA_IRQ_GPIO_CF_IRQ,
.cd_irq = TOSA_IRQ_GPIO_CF_CD,
.cd_irq_str = "PCMCIA0 CD",
},{
.dev = &tosascoop_jc_device.dev,
.irq = TOSA_IRQ_GPIO_JC_CF_IRQ,
.cd_irq = -1,
},
};
static struct platform_device *devices[] __initdata = {
&tosascoop_device,
&tosascoop_jc_device,
};
static void __init tosa_init(void)
{
pxa_gpio_mode(TOSA_GPIO_ON_RESET | GPIO_IN);
pxa_gpio_mode(TOSA_GPIO_TC6393_INT | GPIO_IN);
/* setup sleep mode values */
PWER = 0x00000002;
PFER = 0x00000000;
PRER = 0x00000002;
PGSR0 = 0x00000000;
PGSR1 = 0x00FF0002;
PGSR2 = 0x00014000;
PCFR |= PCFR_OPDE;
// enable batt_fault
PMCR = 0x01;
platform_add_devices(devices, ARRAY_SIZE(devices));
scoop_num = 2;
scoop_devs = &tosa_pcmcia_scoop[0];
}
static void __init fixup_tosa(struct machine_desc *desc,
struct tag *tags, char **cmdline, struct meminfo *mi)
{
sharpsl_save_param();
mi->nr_banks=1;
mi->bank[0].start = 0xa0000000;
mi->bank[0].node = 0;
mi->bank[0].size = (64*1024*1024);
}
MACHINE_START(TOSA, "SHARP Tosa")
.phys_ram = 0xa0000000,
.phys_io = 0x40000000,
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
.fixup = fixup_tosa,
.map_io = pxa_map_io,
.init_irq = pxa_init_irq,
.init_machine = tosa_init,
.timer = &pxa_timer,
MACHINE_END

2
include/asm-arm/arch-iop3xx/iop331.h
View File

@ -42,7 +42,7 @@
/* this can be 128M if OMWTVR1 is set */
#define IOP331_PCI_MEM_WINDOW_SIZE 0x04000000 /* 64M outbound window */
//#define IOP331_PCI_MEM_WINDOW_SIZE (~*IOP331_IALR1 + 1)
/* #define IOP331_PCI_MEM_WINDOW_SIZE (~*IOP331_IALR1 + 1) */
#define IOP331_PCI_LOWER_MEM_PA 0x80000000
#define IOP331_PCI_LOWER_MEM_BA (*IOP331_OMWTVR0)
#define IOP331_PCI_UPPER_MEM_PA (IOP331_PCI_LOWER_MEM_PA + IOP331_PCI_MEM_WINDOW_SIZE - 1)

12
include/asm-arm/arch-pxa/pm.h Normal file
View File

@ -0,0 +1,12 @@
/*
* Copyright (c) 2005 Richard Purdie
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
extern int pxa_pm_prepare(suspend_state_t state);
extern int pxa_pm_enter(suspend_state_t state);
extern int pxa_pm_finish(suspend_state_t state);

166
include/asm-arm/arch-pxa/tosa.h Normal file
View File

@ -0,0 +1,166 @@
/*
* Hardware specific definitions for Sharp SL-C6000x series of PDAs
*
* Copyright (c) 2005 Dirk Opfer
*
* Based on Sharp's 2.4 kernel patches
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#ifndef _ASM_ARCH_TOSA_H_
#define _ASM_ARCH_TOSA_H_ 1
/* TOSA Chip selects */
#define TOSA_LCDC_PHYS PXA_CS4_PHYS
/* Internel Scoop */
#define TOSA_CF_PHYS (PXA_CS2_PHYS + 0x00800000)
/* Jacket Scoop */
#define TOSA_SCOOP_PHYS (PXA_CS5_PHYS + 0x00800000)
/*
* SCOOP2 internal GPIOs
*/
#define TOSA_SCOOP_PXA_VCORE1 SCOOP_GPCR_PA11
#define TOSA_SCOOP_TC6393_REST_IN SCOOP_GPCR_PA12
#define TOSA_SCOOP_IR_POWERDWN SCOOP_GPCR_PA13
#define TOSA_SCOOP_SD_WP SCOOP_GPCR_PA14
#define TOSA_SCOOP_PWR_ON SCOOP_GPCR_PA15
#define TOSA_SCOOP_AUD_PWR_ON SCOOP_GPCR_PA16
#define TOSA_SCOOP_BT_RESET SCOOP_GPCR_PA17
#define TOSA_SCOOP_BT_PWR_EN SCOOP_GPCR_PA18
#define TOSA_SCOOP_AC_IN_OL SCOOP_GPCR_PA19
/* GPIO Direction 1 : output mode / 0:input mode */
#define TOSA_SCOOP_IO_DIR ( TOSA_SCOOP_PXA_VCORE1 | TOSA_SCOOP_TC6393_REST_IN | \
TOSA_SCOOP_IR_POWERDWN | TOSA_SCOOP_PWR_ON | TOSA_SCOOP_AUD_PWR_ON |\
TOSA_SCOOP_BT_RESET | TOSA_SCOOP_BT_PWR_EN )
/* GPIO out put level when init 1: Hi */
#define TOSA_SCOOP_IO_OUT ( TOSA_SCOOP_TC6393_REST_IN )
/*
* SCOOP2 jacket GPIOs
*/
#define TOSA_SCOOP_JC_BT_LED SCOOP_GPCR_PA11
#define TOSA_SCOOP_JC_NOTE_LED SCOOP_GPCR_PA12
#define TOSA_SCOOP_JC_CHRG_ERR_LED SCOOP_GPCR_PA13
#define TOSA_SCOOP_JC_USB_PULLUP SCOOP_GPCR_PA14
#define TOSA_SCOOP_JC_TC6393_SUSPEND SCOOP_GPCR_PA15
#define TOSA_SCOOP_JC_TC3693_L3V_ON SCOOP_GPCR_PA16
#define TOSA_SCOOP_JC_WLAN_DETECT SCOOP_GPCR_PA17
#define TOSA_SCOOP_JC_WLAN_LED SCOOP_GPCR_PA18
#define TOSA_SCOOP_JC_CARD_LIMIT_SEL SCOOP_GPCR_PA19
/* GPIO Direction 1 : output mode / 0:input mode */
#define TOSA_SCOOP_JC_IO_DIR ( TOSA_SCOOP_JC_BT_LED | TOSA_SCOOP_JC_NOTE_LED | \
TOSA_SCOOP_JC_CHRG_ERR_LED | TOSA_SCOOP_JC_USB_PULLUP | \
TOSA_SCOOP_JC_TC6393_SUSPEND | TOSA_SCOOP_JC_TC3693_L3V_ON | \
TOSA_SCOOP_JC_WLAN_LED | TOSA_SCOOP_JC_CARD_LIMIT_SEL )
/* GPIO out put level when init 1: Hi */
#define TOSA_SCOOP_JC_IO_OUT ( 0 )
/*
* Timing Generator
*/
#define TG_PNLCTL 0x00
#define TG_TPOSCTL 0x01
#define TG_DUTYCTL 0x02
#define TG_GPOSR 0x03
#define TG_GPODR1 0x04
#define TG_GPODR2 0x05
#define TG_PINICTL 0x06
#define TG_HPOSCTL 0x07
/*
* LED
*/
#define TOSA_SCOOP_LED_BLUE TOSA_SCOOP_GPCR_PA11
#define TOSA_SCOOP_LED_GREEN TOSA_SCOOP_GPCR_PA12
#define TOSA_SCOOP_LED_ORANGE TOSA_SCOOP_GPCR_PA13
#define TOSA_SCOOP_LED_WLAN TOSA_SCOOP_GPCR_PA18
/*
* PXA GPIOs
*/
#define TOSA_GPIO_POWERON (0)
#define TOSA_GPIO_RESET (1)
#define TOSA_GPIO_AC_IN (2)
#define TOSA_GPIO_RECORD_BTN (3)
#define TOSA_GPIO_SYNC (4) /* Cradle SYNC Button */
#define TOSA_GPIO_USB_IN (5)
#define TOSA_GPIO_JACKET_DETECT (7)
#define TOSA_GPIO_nSD_DETECT (9)
#define TOSA_GPIO_nSD_INT (10)
#define TOSA_GPIO_TC6393_CLK (11)
#define TOSA_GPIO_BAT1_CRG (12)
#define TOSA_GPIO_CF_CD (13)
#define TOSA_GPIO_BAT0_CRG (14)
#define TOSA_GPIO_TC6393_INT (15)
#define TOSA_GPIO_BAT0_LOW (17)
#define TOSA_GPIO_TC6393_RDY (18)
#define TOSA_GPIO_ON_RESET (19)
#define TOSA_GPIO_EAR_IN (20)
#define TOSA_GPIO_CF_IRQ (21) /* CF slot0 Ready */
#define TOSA_GPIO_ON_KEY (22)
#define TOSA_GPIO_VGA_LINE (27)
#define TOSA_GPIO_TP_INT (32) /* Touch Panel pen down interrupt */
#define TOSA_GPIO_JC_CF_IRQ (36) /* CF slot1 Ready */
#define TOSA_GPIO_BAT_LOCKED (38) /* Battery locked */
#define TOSA_GPIO_TG_SPI_SCLK (81)
#define TOSA_GPIO_TG_SPI_CS (82)
#define TOSA_GPIO_TG_SPI_MOSI (83)
#define TOSA_GPIO_BAT1_LOW (84)
#define TOSA_GPIO_HP_IN GPIO_EAR_IN
#define TOSA_GPIO_MAIN_BAT_LOW GPIO_BAT0_LOW
#define TOSA_KEY_STROBE_NUM (11)
#define TOSA_KEY_SENSE_NUM (7)
#define TOSA_GPIO_HIGH_STROBE_BIT (0xfc000000)
#define TOSA_GPIO_LOW_STROBE_BIT (0x0000001f)
#define TOSA_GPIO_ALL_SENSE_BIT (0x00000fe0)
#define TOSA_GPIO_ALL_SENSE_RSHIFT (5)
#define TOSA_GPIO_STROBE_BIT(a) GPIO_bit(58+(a))
#define TOSA_GPIO_SENSE_BIT(a) GPIO_bit(69+(a))
#define TOSA_GAFR_HIGH_STROBE_BIT (0xfff00000)
#define TOSA_GAFR_LOW_STROBE_BIT (0x000003ff)
#define TOSA_GAFR_ALL_SENSE_BIT (0x00fffc00)
#define TOSA_GPIO_KEY_SENSE(a) (69+(a))
#define TOSA_GPIO_KEY_STROBE(a) (58+(a))
/*
* Interrupts
*/
#define TOSA_IRQ_GPIO_WAKEUP IRQ_GPIO(TOSA_GPIO_WAKEUP)
#define TOSA_IRQ_GPIO_AC_IN IRQ_GPIO(TOSA_GPIO_AC_IN)
#define TOSA_IRQ_GPIO_RECORD_BTN IRQ_GPIO(TOSA_GPIO_RECORD_BTN)
#define TOSA_IRQ_GPIO_SYNC IRQ_GPIO(TOSA_GPIO_SYNC)
#define TOSA_IRQ_GPIO_USB_IN IRQ_GPIO(TOSA_GPIO_USB_IN)
#define TOSA_IRQ_GPIO_JACKET_DETECT IRQ_GPIO(TOSA_GPIO_JACKET_DETECT)
#define TOSA_IRQ_GPIO_nSD_INT IRQ_GPIO(TOSA_GPIO_nSD_INT)
#define TOSA_IRQ_GPIO_nSD_DETECT IRQ_GPIO(TOSA_GPIO_nSD_DETECT)
#define TOSA_IRQ_GPIO_BAT1_CRG IRQ_GPIO(TOSA_GPIO_BAT1_CRG)
#define TOSA_IRQ_GPIO_CF_CD IRQ_GPIO(TOSA_GPIO_CF_CD)
#define TOSA_IRQ_GPIO_BAT0_CRG IRQ_GPIO(TOSA_GPIO_BAT0_CRG)
#define TOSA_IRQ_GPIO_TC6393_INT IRQ_GPIO(TOSA_GPIO_TC6393_INT)
#define TOSA_IRQ_GPIO_BAT0_LOW IRQ_GPIO(TOSA_GPIO_BAT0_LOW)
#define TOSA_IRQ_GPIO_EAR_IN IRQ_GPIO(TOSA_GPIO_EAR_IN)
#define TOSA_IRQ_GPIO_CF_IRQ IRQ_GPIO(TOSA_GPIO_CF_IRQ)
#define TOSA_IRQ_GPIO_ON_KEY IRQ_GPIO(TOSA_GPIO_ON_KEY)
#define TOSA_IRQ_GPIO_VGA_LINE IRQ_GPIO(TOSA_GPIO_VGA_LINE)
#define TOSA_IRQ_GPIO_TP_INT IRQ_GPIO(TOSA_GPIO_TP_INT)
#define TOSA_IRQ_GPIO_JC_CF_IRQ IRQ_GPIO(TOSA_GPIO_JC_CF_IRQ)
#define TOSA_IRQ_GPIO_BAT_LOCKED IRQ_GPIO(TOSA_GPIO_BAT_LOCKED)
#define TOSA_IRQ_GPIO_BAT1_LOW IRQ_GPIO(TOSA_GPIO_BAT1_LOW)
#define TOSA_IRQ_GPIO_KEY_SENSE(a) IRQ_GPIO(69+(a))
#define TOSA_IRQ_GPIO_MAIN_BAT_LOW IRQ_GPIO(TOSA_GPIO_MAIN_BAT_LOW)
extern struct platform_device tosascoop_jc_device;
extern struct platform_device tosascoop_device;
#endif /* _ASM_ARCH_TOSA_H_ */

1
include/asm-arm/mmu_context.h
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@ -13,6 +13,7 @@
#ifndef __ASM_ARM_MMU_CONTEXT_H
#define __ASM_ARM_MMU_CONTEXT_H
#include <asm/cacheflush.h>
#include <asm/proc-fns.h>
#if __LINUX_ARM_ARCH__ >= 6