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drm/amd/powerplay: correct swSMU baco reset related settings
Added bif doorbell interrupt setting and applied different settings for BACO reset for RAS recovery. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1668,6 +1668,10 @@ int smu_v11_0_baco_set_state(struct smu_context *smu, enum smu_baco_state state)
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{
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struct smu_baco_context *smu_baco = &smu->smu_baco;
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struct amdgpu_device *adev = smu->adev;
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struct amdgpu_ras *ras = amdgpu_ras_get_context(adev);
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uint32_t bif_doorbell_intr_cntl;
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uint32_t data;
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int ret = 0;
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if (smu_v11_0_baco_get_state(smu) == state)
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@ -1675,10 +1679,30 @@ int smu_v11_0_baco_set_state(struct smu_context *smu, enum smu_baco_state state)
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mutex_lock(&smu_baco->mutex);
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if (state == SMU_BACO_STATE_ENTER)
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ret = smu_send_smc_msg_with_param(smu, SMU_MSG_EnterBaco, BACO_SEQ_BACO);
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else
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bif_doorbell_intr_cntl = RREG32_SOC15(NBIO, 0, mmBIF_DOORBELL_INT_CNTL);
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if (state == SMU_BACO_STATE_ENTER) {
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bif_doorbell_intr_cntl = REG_SET_FIELD(bif_doorbell_intr_cntl,
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BIF_DOORBELL_INT_CNTL,
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DOORBELL_INTERRUPT_DISABLE, 1);
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WREG32_SOC15(NBIO, 0, mmBIF_DOORBELL_INT_CNTL, bif_doorbell_intr_cntl);
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if (!ras || !ras->supported) {
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data = RREG32_SOC15(THM, 0, mmTHM_BACO_CNTL);
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data |= 0x80000000;
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WREG32_SOC15(THM, 0, mmTHM_BACO_CNTL, data);
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ret = smu_send_smc_msg_with_param(smu, SMU_MSG_EnterBaco, 0);
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} else {
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ret = smu_send_smc_msg_with_param(smu, SMU_MSG_EnterBaco, 1);
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}
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} else {
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ret = smu_send_smc_msg(smu, SMU_MSG_ExitBaco);
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bif_doorbell_intr_cntl = REG_SET_FIELD(bif_doorbell_intr_cntl,
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BIF_DOORBELL_INT_CNTL,
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DOORBELL_INTERRUPT_DISABLE, 0);
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WREG32_SOC15(NBIO, 0, mmBIF_DOORBELL_INT_CNTL, bif_doorbell_intr_cntl);
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}
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if (ret)
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goto out;
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