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crypto: qat - Intel(R) QAT ucode part of fw loader
This patch adds microcode part of the firmware loader. v4 - splits FW loader part into two smaller patches. Acked-by: Bo Cui <bo.cui@intel.com> Reviewed-by: Bruce W. Allan <bruce.w.allan@intel.com> Signed-off-by: Karen Xiang <karen.xiang@intel.com> Signed-off-by: Pingchaox Yang <pingchaox.yang@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Tadeusz Struk
Herbert Xu
parent
d370cec321
commit
b4b7e67c91
377
drivers/crypto/qat/qat_common/icp_qat_uclo.h
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377
drivers/crypto/qat/qat_common/icp_qat_uclo.h
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@ -0,0 +1,377 @@
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/*
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This file is provided under a dual BSD/GPLv2 license. When using or
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redistributing this file, you may do so under either license.
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GPL LICENSE SUMMARY
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Copyright(c) 2014 Intel Corporation.
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This program is free software; you can redistribute it and/or modify
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it under the terms of version 2 of the GNU General Public License as
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published by the Free Software Foundation.
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This program is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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General Public License for more details.
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Contact Information:
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qat-linux@intel.com
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BSD LICENSE
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Copyright(c) 2014 Intel Corporation.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
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are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
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distribution.
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* Neither the name of Intel Corporation nor the names of its
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __ICP_QAT_UCLO_H__
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#define __ICP_QAT_UCLO_H__
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#define ICP_QAT_AC_C_CPU_TYPE 0x00400000
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#define ICP_QAT_UCLO_MAX_AE 12
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#define ICP_QAT_UCLO_MAX_CTX 8
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#define ICP_QAT_UCLO_MAX_UIMAGE (ICP_QAT_UCLO_MAX_AE * ICP_QAT_UCLO_MAX_CTX)
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#define ICP_QAT_UCLO_MAX_USTORE 0x4000
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#define ICP_QAT_UCLO_MAX_XFER_REG 128
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#define ICP_QAT_UCLO_MAX_GPR_REG 128
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#define ICP_QAT_UCLO_MAX_NN_REG 128
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#define ICP_QAT_UCLO_MAX_LMEM_REG 1024
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#define ICP_QAT_UCLO_AE_ALL_CTX 0xff
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#define ICP_QAT_UOF_OBJID_LEN 8
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#define ICP_QAT_UOF_FID 0xc6c2
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#define ICP_QAT_UOF_MAJVER 0x4
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#define ICP_QAT_UOF_MINVER 0x11
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#define ICP_QAT_UOF_NN_MODE_NOTCARE 0xff
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#define ICP_QAT_UOF_OBJS "UOF_OBJS"
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#define ICP_QAT_UOF_STRT "UOF_STRT"
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#define ICP_QAT_UOF_GTID "UOF_GTID"
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#define ICP_QAT_UOF_IMAG "UOF_IMAG"
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#define ICP_QAT_UOF_IMEM "UOF_IMEM"
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#define ICP_QAT_UOF_MSEG "UOF_MSEG"
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#define ICP_QAT_UOF_LOCAL_SCOPE 1
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#define ICP_QAT_UOF_INIT_EXPR 0
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#define ICP_QAT_UOF_INIT_REG 1
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#define ICP_QAT_UOF_INIT_REG_CTX 2
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#define ICP_QAT_UOF_INIT_EXPR_ENDIAN_SWAP 3
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#define ICP_QAT_CTX_MODE(ae_mode) ((ae_mode) & 0xf)
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#define ICP_QAT_NN_MODE(ae_mode) (((ae_mode) >> 0x4) & 0xf)
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#define ICP_QAT_SHARED_USTORE_MODE(ae_mode) (((ae_mode) >> 0xb) & 0x1)
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#define RELOADABLE_CTX_SHARED_MODE(ae_mode) (((ae_mode) >> 0xc) & 0x1)
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#define ICP_QAT_LOC_MEM0_MODE(ae_mode) (((ae_mode) >> 0x8) & 0x1)
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#define ICP_QAT_LOC_MEM1_MODE(ae_mode) (((ae_mode) >> 0x9) & 0x1)
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enum icp_qat_uof_mem_region {
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ICP_QAT_UOF_SRAM_REGION = 0x0,
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ICP_QAT_UOF_LMEM_REGION = 0x3,
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ICP_QAT_UOF_UMEM_REGION = 0x5
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};
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enum icp_qat_uof_regtype {
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ICP_NO_DEST,
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ICP_GPA_REL,
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ICP_GPA_ABS,
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ICP_GPB_REL,
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ICP_GPB_ABS,
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ICP_SR_REL,
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ICP_SR_RD_REL,
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ICP_SR_WR_REL,
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ICP_SR_ABS,
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ICP_SR_RD_ABS,
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ICP_SR_WR_ABS,
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ICP_DR_REL,
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ICP_DR_RD_REL,
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ICP_DR_WR_REL,
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ICP_DR_ABS,
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ICP_DR_RD_ABS,
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ICP_DR_WR_ABS,
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ICP_LMEM,
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ICP_LMEM0,
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ICP_LMEM1,
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ICP_NEIGH_REL,
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};
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struct icp_qat_uclo_page {
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struct icp_qat_uclo_encap_page *encap_page;
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struct icp_qat_uclo_region *region;
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unsigned int flags;
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};
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struct icp_qat_uclo_region {
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struct icp_qat_uclo_page *loaded;
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struct icp_qat_uclo_page *page;
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};
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struct icp_qat_uclo_aeslice {
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struct icp_qat_uclo_region *regions;
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struct icp_qat_uclo_page *page;
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struct icp_qat_uclo_page *cur_page[ICP_QAT_UCLO_MAX_CTX];
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struct icp_qat_uclo_encapme *encap_image;
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unsigned int ctx_mask_assigned;
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unsigned int new_uaddr[ICP_QAT_UCLO_MAX_CTX];
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};
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struct icp_qat_uclo_aedata {
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unsigned int slice_num;
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unsigned int eff_ustore_size;
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struct icp_qat_uclo_aeslice ae_slices[ICP_QAT_UCLO_MAX_CTX];
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};
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struct icp_qat_uof_encap_obj {
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char *beg_uof;
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struct icp_qat_uof_objhdr *obj_hdr;
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struct icp_qat_uof_chunkhdr *chunk_hdr;
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struct icp_qat_uof_varmem_seg *var_mem_seg;
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};
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struct icp_qat_uclo_encap_uwblock {
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unsigned int start_addr;
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unsigned int words_num;
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uint64_t micro_words;
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};
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struct icp_qat_uclo_encap_page {
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unsigned int def_page;
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unsigned int page_region;
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unsigned int beg_addr_v;
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unsigned int beg_addr_p;
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unsigned int micro_words_num;
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unsigned int uwblock_num;
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struct icp_qat_uclo_encap_uwblock *uwblock;
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};
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struct icp_qat_uclo_encapme {
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struct icp_qat_uof_image *img_ptr;
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struct icp_qat_uclo_encap_page *page;
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unsigned int ae_reg_num;
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struct icp_qat_uof_ae_reg *ae_reg;
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unsigned int init_regsym_num;
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struct icp_qat_uof_init_regsym *init_regsym;
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unsigned int sbreak_num;
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struct icp_qat_uof_sbreak *sbreak;
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unsigned int uwords_num;
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};
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struct icp_qat_uclo_init_mem_table {
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unsigned int entry_num;
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struct icp_qat_uof_initmem *init_mem;
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};
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struct icp_qat_uclo_objhdr {
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char *file_buff;
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unsigned int checksum;
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unsigned int size;
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};
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struct icp_qat_uof_strtable {
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unsigned int table_len;
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unsigned int reserved;
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uint64_t strings;
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};
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struct icp_qat_uclo_objhandle {
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unsigned int prod_type;
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unsigned int prod_rev;
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struct icp_qat_uclo_objhdr *obj_hdr;
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struct icp_qat_uof_encap_obj encap_uof_obj;
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struct icp_qat_uof_strtable str_table;
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struct icp_qat_uclo_encapme ae_uimage[ICP_QAT_UCLO_MAX_UIMAGE];
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struct icp_qat_uclo_aedata ae_data[ICP_QAT_UCLO_MAX_AE];
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struct icp_qat_uclo_init_mem_table init_mem_tab;
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struct icp_qat_uof_batch_init *lm_init_tab[ICP_QAT_UCLO_MAX_AE];
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struct icp_qat_uof_batch_init *umem_init_tab[ICP_QAT_UCLO_MAX_AE];
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int uimage_num;
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int uword_in_bytes;
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int global_inited;
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unsigned int ae_num;
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unsigned int ustore_phy_size;
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void *obj_buf;
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uint64_t *uword_buf;
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};
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struct icp_qat_uof_uword_block {
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unsigned int start_addr;
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unsigned int words_num;
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unsigned int uword_offset;
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unsigned int reserved;
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};
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struct icp_qat_uof_filehdr {
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unsigned short file_id;
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unsigned short reserved1;
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char min_ver;
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char maj_ver;
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unsigned short reserved2;
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unsigned short max_chunks;
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unsigned short num_chunks;
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};
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struct icp_qat_uof_filechunkhdr {
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char chunk_id[ICP_QAT_UOF_OBJID_LEN];
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unsigned int checksum;
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unsigned int offset;
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unsigned int size;
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};
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struct icp_qat_uof_objhdr {
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unsigned int cpu_type;
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unsigned short min_cpu_ver;
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unsigned short max_cpu_ver;
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short max_chunks;
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short num_chunks;
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unsigned int reserved1;
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unsigned int reserved2;
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};
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struct icp_qat_uof_chunkhdr {
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char chunk_id[ICP_QAT_UOF_OBJID_LEN];
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unsigned int offset;
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unsigned int size;
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};
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struct icp_qat_uof_memvar_attr {
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unsigned int offset_in_byte;
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unsigned int value;
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};
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struct icp_qat_uof_initmem {
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unsigned int sym_name;
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char region;
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char scope;
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unsigned short reserved1;
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unsigned int addr;
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unsigned int num_in_bytes;
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unsigned int val_attr_num;
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};
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struct icp_qat_uof_init_regsym {
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unsigned int sym_name;
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char init_type;
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char value_type;
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char reg_type;
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unsigned char ctx;
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unsigned int reg_addr;
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unsigned int value;
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};
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struct icp_qat_uof_varmem_seg {
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unsigned int sram_base;
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unsigned int sram_size;
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unsigned int sram_alignment;
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unsigned int sdram_base;
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unsigned int sdram_size;
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unsigned int sdram_alignment;
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unsigned int sdram1_base;
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unsigned int sdram1_size;
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unsigned int sdram1_alignment;
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unsigned int scratch_base;
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unsigned int scratch_size;
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unsigned int scratch_alignment;
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};
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struct icp_qat_uof_gtid {
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char tool_id[ICP_QAT_UOF_OBJID_LEN];
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int tool_ver;
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unsigned int reserved1;
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unsigned int reserved2;
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};
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struct icp_qat_uof_sbreak {
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unsigned int page_num;
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unsigned int virt_uaddr;
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unsigned char sbreak_type;
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unsigned char reg_type;
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unsigned short reserved1;
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unsigned int addr_offset;
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unsigned int reg_addr;
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};
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struct icp_qat_uof_code_page {
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unsigned int page_region;
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unsigned int page_num;
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unsigned char def_page;
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unsigned char reserved2;
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unsigned short reserved1;
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unsigned int beg_addr_v;
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unsigned int beg_addr_p;
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unsigned int neigh_reg_tab_offset;
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unsigned int uc_var_tab_offset;
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unsigned int imp_var_tab_offset;
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unsigned int imp_expr_tab_offset;
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unsigned int code_area_offset;
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};
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struct icp_qat_uof_image {
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unsigned int img_name;
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unsigned int ae_assigned;
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unsigned int ctx_assigned;
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unsigned int cpu_type;
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unsigned int entry_address;
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unsigned int fill_pattern[2];
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unsigned int reloadable_size;
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unsigned char sensitivity;
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unsigned char reserved;
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unsigned short ae_mode;
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unsigned short max_ver;
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unsigned short min_ver;
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unsigned short image_attrib;
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unsigned short reserved2;
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unsigned short page_region_num;
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unsigned short numpages;
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unsigned int reg_tab_offset;
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unsigned int init_reg_sym_tab;
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unsigned int sbreak_tab;
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unsigned int app_metadata;
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};
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struct icp_qat_uof_objtable {
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unsigned int entry_num;
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};
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struct icp_qat_uof_ae_reg {
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unsigned int name;
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unsigned int vis_name;
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unsigned short type;
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unsigned short addr;
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unsigned short access_mode;
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unsigned char visible;
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unsigned char reserved1;
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unsigned short ref_count;
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unsigned short reserved2;
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unsigned int xo_id;
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};
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struct icp_qat_uof_code_area {
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unsigned int micro_words_num;
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unsigned int uword_block_tab;
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};
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struct icp_qat_uof_batch_init {
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unsigned int ae;
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unsigned int addr;
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unsigned int *value;
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unsigned int size;
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struct icp_qat_uof_batch_init *next;
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};
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#endif
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1192
drivers/crypto/qat/qat_common/qat_uclo.c
Normal file
1192
drivers/crypto/qat/qat_common/qat_uclo.c
Normal file
File diff suppressed because it is too large
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