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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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mvebu fixes for v3.12
- mvebu - fix reference leaks by adding of_node_put() - update Armada XP DT clock properties to restore booting - kirkwood - add missing reg property for cpu@0 - fix typo in address of second XOR engine -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.20 (GNU/Linux) iQEcBAABAgAGBQJSO8JQAAoJEAi3KVZQDZAe660IAJV2Zqc/iMxmRJLCPoFnSpGd uFsthQx0e+OGVW+KowykPve2p6RxOqol2wR1IvgMlkCPFBtUGhGkEeXvJ1wenS9H JNEtG7fU6AAiaw9dfS6OJtPMxQK3yTSjkVcuaNi0Ds/q99ja9ZYR6RPYzqe8kQME k9dX3OGNzm+nI7BKheVYcB4zmxBfCtSHzBe2tdwK6mdoki9Qdt4FY4LosXwQHt4d 5BjHGLLgbOp/fCrztgYD4ZiuuJekXz51OP1ut2giIdlakgW0DIRCRadyLyyZMH7S Wrl636TaYAdh/jXu00mTZIj13K0NDXcERjemjb7O16LFB0fAIz+DYXVVM2nB1iE= =B2UP -----END PGP SIGNATURE----- Merge tag 'fixes-3.12' of git://git.infradead.org/linux-mvebu into fixes From Jason Cooper, mvebu fixes for v3.12: - mvebu - fix reference leaks by adding of_node_put() - update Armada XP DT clock properties to restore booting - kirkwood - add missing reg property for cpu@0 - fix typo in address of second XOR engine * tag 'fixes-3.12' of git://git.infradead.org/linux-mvebu: ARM: kirkwood: Fix address of second XOR engine ARM: mvebu: Add clock properties to Armada XP timer node ARM: mvebu: Add the reference 25 MHz fixed-clock to Armada XP ARM: Kirkwood: Add missing DT reg property to cpu@0 bus: mvebu: add missing of_node_put() to fix reference leak ARM: mvebu: add missing of_node_put() to fix reference leak Signed-off-by: Olof Johansson <olof@lixom.net>
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commit
b44cf0226d
@ -70,6 +70,8 @@ serial@12300 {
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timer@20300 {
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compatible = "marvell,armada-xp-timer";
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clocks = <&coreclk 2>, <&refclk>;
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clock-names = "nbclk", "fixed";
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};
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coreclk: mvebu-sar@18230 {
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@ -169,4 +171,13 @@ thermal@182b0 {
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};
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};
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};
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clocks {
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/* 25 MHz reference crystal */
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refclk: oscillator {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <25000000>;
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};
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};
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};
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@ -13,6 +13,7 @@ cpus {
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cpu@0 {
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device_type = "cpu";
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compatible = "marvell,feroceon";
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reg = <0>;
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clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>;
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clock-names = "cpu_clk", "ddrclk", "powersave";
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};
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@ -167,7 +168,7 @@ xor01 {
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xor@60900 {
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compatible = "marvell,orion-xor";
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reg = <0x60900 0x100
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0xd0B00 0x100>;
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0x60B00 0x100>;
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status = "okay";
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clocks = <&gate_clk 16>;
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@ -140,6 +140,7 @@ int __init coherency_init(void)
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coherency_base = of_iomap(np, 0);
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coherency_cpu_base = of_iomap(np, 1);
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set_cpu_coherent(cpu_logical_map(smp_processor_id()), 0);
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of_node_put(np);
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}
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return 0;
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@ -147,9 +148,14 @@ int __init coherency_init(void)
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static int __init coherency_late_init(void)
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{
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if (of_find_matching_node(NULL, of_coherency_table))
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struct device_node *np;
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np = of_find_matching_node(NULL, of_coherency_table);
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if (np) {
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bus_register_notifier(&platform_bus_type,
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&mvebu_hwcc_platform_nb);
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of_node_put(np);
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}
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return 0;
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}
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@ -67,6 +67,7 @@ int __init armada_370_xp_pmsu_init(void)
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pr_info("Initializing Power Management Service Unit\n");
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pmsu_mp_base = of_iomap(np, 0);
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pmsu_reset_base = of_iomap(np, 1);
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of_node_put(np);
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}
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return 0;
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@ -98,6 +98,7 @@ static int __init mvebu_system_controller_init(void)
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BUG_ON(!match);
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system_controller_base = of_iomap(np, 0);
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mvebu_sc = (struct mvebu_system_controller *)match->data;
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of_node_put(np);
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}
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return 0;
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@ -700,6 +700,7 @@ static int __init mvebu_mbus_common_init(struct mvebu_mbus_state *mbus,
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phys_addr_t sdramwins_phys_base,
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size_t sdramwins_size)
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{
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struct device_node *np;
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int win;
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mbus->mbuswins_base = ioremap(mbuswins_phys_base, mbuswins_size);
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@ -712,8 +713,11 @@ static int __init mvebu_mbus_common_init(struct mvebu_mbus_state *mbus,
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return -ENOMEM;
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}
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if (of_find_compatible_node(NULL, NULL, "marvell,coherency-fabric"))
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np = of_find_compatible_node(NULL, NULL, "marvell,coherency-fabric");
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if (np) {
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mbus->hw_io_coherency = 1;
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of_node_put(np);
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}
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for (win = 0; win < mbus->soc->num_wins; win++)
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mvebu_mbus_disable_window(mbus, win);
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