mvebu fixes for v3.12

- mvebu
     - fix reference leaks by adding of_node_put()
     - update Armada XP DT clock properties to restore booting
 
  - kirkwood
     - add missing reg property for cpu@0
     - fix typo in address of second XOR engine
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Merge tag 'fixes-3.12' of git://git.infradead.org/linux-mvebu into fixes

From Jason Cooper, mvebu fixes for v3.12:

 - mvebu
    - fix reference leaks by adding of_node_put()
    - update Armada XP DT clock properties to restore booting
 - kirkwood
    - add missing reg property for cpu@0
    - fix typo in address of second XOR engine

* tag 'fixes-3.12' of git://git.infradead.org/linux-mvebu:
  ARM: kirkwood: Fix address of second XOR engine
  ARM: mvebu: Add clock properties to Armada XP timer node
  ARM: mvebu: Add the reference 25 MHz fixed-clock to Armada XP
  ARM: Kirkwood: Add missing DT reg property to cpu@0
  bus: mvebu: add missing of_node_put() to fix reference leak
  ARM: mvebu: add missing of_node_put() to fix reference leak

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2013-09-20 10:34:03 -07:00
commit b44cf0226d
6 changed files with 27 additions and 3 deletions

View File

@ -70,6 +70,8 @@ serial@12300 {
timer@20300 {
compatible = "marvell,armada-xp-timer";
clocks = <&coreclk 2>, <&refclk>;
clock-names = "nbclk", "fixed";
};
coreclk: mvebu-sar@18230 {
@ -169,4 +171,13 @@ thermal@182b0 {
};
};
};
clocks {
/* 25 MHz reference crystal */
refclk: oscillator {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
};
};
};

View File

@ -13,6 +13,7 @@ cpus {
cpu@0 {
device_type = "cpu";
compatible = "marvell,feroceon";
reg = <0>;
clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>;
clock-names = "cpu_clk", "ddrclk", "powersave";
};
@ -167,7 +168,7 @@ xor01 {
xor@60900 {
compatible = "marvell,orion-xor";
reg = <0x60900 0x100
0xd0B00 0x100>;
0x60B00 0x100>;
status = "okay";
clocks = <&gate_clk 16>;

View File

@ -140,6 +140,7 @@ int __init coherency_init(void)
coherency_base = of_iomap(np, 0);
coherency_cpu_base = of_iomap(np, 1);
set_cpu_coherent(cpu_logical_map(smp_processor_id()), 0);
of_node_put(np);
}
return 0;
@ -147,9 +148,14 @@ int __init coherency_init(void)
static int __init coherency_late_init(void)
{
if (of_find_matching_node(NULL, of_coherency_table))
struct device_node *np;
np = of_find_matching_node(NULL, of_coherency_table);
if (np) {
bus_register_notifier(&platform_bus_type,
&mvebu_hwcc_platform_nb);
of_node_put(np);
}
return 0;
}

View File

@ -67,6 +67,7 @@ int __init armada_370_xp_pmsu_init(void)
pr_info("Initializing Power Management Service Unit\n");
pmsu_mp_base = of_iomap(np, 0);
pmsu_reset_base = of_iomap(np, 1);
of_node_put(np);
}
return 0;

View File

@ -98,6 +98,7 @@ static int __init mvebu_system_controller_init(void)
BUG_ON(!match);
system_controller_base = of_iomap(np, 0);
mvebu_sc = (struct mvebu_system_controller *)match->data;
of_node_put(np);
}
return 0;

View File

@ -700,6 +700,7 @@ static int __init mvebu_mbus_common_init(struct mvebu_mbus_state *mbus,
phys_addr_t sdramwins_phys_base,
size_t sdramwins_size)
{
struct device_node *np;
int win;
mbus->mbuswins_base = ioremap(mbuswins_phys_base, mbuswins_size);
@ -712,8 +713,11 @@ static int __init mvebu_mbus_common_init(struct mvebu_mbus_state *mbus,
return -ENOMEM;
}
if (of_find_compatible_node(NULL, NULL, "marvell,coherency-fabric"))
np = of_find_compatible_node(NULL, NULL, "marvell,coherency-fabric");
if (np) {
mbus->hw_io_coherency = 1;
of_node_put(np);
}
for (win = 0; win < mbus->soc->num_wins; win++)
mvebu_mbus_disable_window(mbus, win);