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drm/amdgpu: use scheduler user seq instead of previous user seq

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Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
This commit is contained in:
Chunming Zhou 2015-07-21 15:13:53 +08:00 committed by Alex Deucher
parent 049fc527b4
commit b43a9a7e87
1 changed files with 20 additions and 6 deletions
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24
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
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@ -225,10 +225,16 @@ uint64_t amdgpu_ctx_add_fence(struct amdgpu_ctx *ctx, struct amdgpu_ring *ring,
struct fence *fence) struct fence *fence)
{ {
struct amdgpu_ctx_ring *cring = & ctx->rings[ring->idx]; struct amdgpu_ctx_ring *cring = & ctx->rings[ring->idx];
uint64_t seq = cring->sequence; uint64_t seq = 0;
unsigned idx = seq % AMDGPU_CTX_MAX_CS_PENDING; unsigned idx = 0;
struct fence *other = cring->fences[idx]; struct fence *other = NULL;
if (amdgpu_enable_scheduler)
seq = atomic64_read(&cring->c_entity.last_queued_v_seq);
else
seq = cring->sequence;
idx = seq % AMDGPU_CTX_MAX_CS_PENDING;
other = cring->fences[idx];
if (other) { if (other) {
signed long r; signed long r;
r = fence_wait_timeout(other, false, MAX_SCHEDULE_TIMEOUT); r = fence_wait_timeout(other, false, MAX_SCHEDULE_TIMEOUT);
@ -240,6 +246,7 @@ uint64_t amdgpu_ctx_add_fence(struct amdgpu_ctx *ctx, struct amdgpu_ring *ring,
spin_lock(&ctx->ring_lock); spin_lock(&ctx->ring_lock);
cring->fences[idx] = fence; cring->fences[idx] = fence;
if (!amdgpu_enable_scheduler)
cring->sequence++; cring->sequence++;
spin_unlock(&ctx->ring_lock); spin_unlock(&ctx->ring_lock);
@ -253,14 +260,21 @@ struct fence *amdgpu_ctx_get_fence(struct amdgpu_ctx *ctx,
{ {
struct amdgpu_ctx_ring *cring = & ctx->rings[ring->idx]; struct amdgpu_ctx_ring *cring = & ctx->rings[ring->idx];
struct fence *fence; struct fence *fence;
uint64_t queued_seq;
spin_lock(&ctx->ring_lock); spin_lock(&ctx->ring_lock);
if (seq >= cring->sequence) { if (amdgpu_enable_scheduler)
queued_seq = atomic64_read(&cring->c_entity.last_queued_v_seq) + 1;
else
queued_seq = cring->sequence;
if (seq >= queued_seq) {
spin_unlock(&ctx->ring_lock); spin_unlock(&ctx->ring_lock);
return ERR_PTR(-EINVAL); return ERR_PTR(-EINVAL);
} }
if (seq + AMDGPU_CTX_MAX_CS_PENDING < cring->sequence) {
if (seq + AMDGPU_CTX_MAX_CS_PENDING < queued_seq) {
spin_unlock(&ctx->ring_lock); spin_unlock(&ctx->ring_lock);
return NULL; return NULL;
} }