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can: flexcan: rename macro FLEXCAN_IFLAG_MB() -> FLEXCAN_IFLAG2_MB()
The macro FLEXCAN_IFLAG_MB() is always used for the iflag2 register, so rename it to FLEXCAN_IFLAG2_MB() Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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@ -142,7 +142,7 @@
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#define FLEXCAN_TX_MB_RESERVED_OFF_FIFO 8
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#define FLEXCAN_TX_MB_RESERVED_OFF_TIMESTAMP 0
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#define FLEXCAN_RX_MB_OFF_TIMESTAMP_FIRST (FLEXCAN_TX_MB_RESERVED_OFF_TIMESTAMP + 1)
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#define FLEXCAN_IFLAG_MB(x) BIT((x) & 0x1f)
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#define FLEXCAN_IFLAG2_MB(x) BIT((x) & 0x1f)
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#define FLEXCAN_IFLAG_RX_FIFO_OVERFLOW BIT(7)
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#define FLEXCAN_IFLAG_RX_FIFO_WARN BIT(6)
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#define FLEXCAN_IFLAG_RX_FIFO_AVAILABLE BIT(5)
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@ -879,7 +879,7 @@ static inline u64 flexcan_read_reg_iflag_rx(struct flexcan_priv *priv)
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u32 iflag1, iflag2;
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iflag2 = priv->read(®s->iflag2) & priv->reg_imask2_default &
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~FLEXCAN_IFLAG_MB(priv->tx_mb_idx);
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~FLEXCAN_IFLAG2_MB(priv->tx_mb_idx);
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iflag1 = priv->read(®s->iflag1) & priv->reg_imask1_default;
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return (u64)iflag2 << 32 | iflag1;
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@ -929,7 +929,7 @@ static irqreturn_t flexcan_irq(int irq, void *dev_id)
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reg_iflag2 = priv->read(®s->iflag2);
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/* transmission complete interrupt */
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if (reg_iflag2 & FLEXCAN_IFLAG_MB(priv->tx_mb_idx)) {
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if (reg_iflag2 & FLEXCAN_IFLAG2_MB(priv->tx_mb_idx)) {
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u32 reg_ctrl = priv->read(&priv->tx_mb->can_ctrl);
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handled = IRQ_HANDLED;
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@ -941,7 +941,7 @@ static irqreturn_t flexcan_irq(int irq, void *dev_id)
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/* after sending a RTR frame MB is in RX mode */
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priv->write(FLEXCAN_MB_CODE_TX_INACTIVE,
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&priv->tx_mb->can_ctrl);
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priv->write(FLEXCAN_IFLAG_MB(priv->tx_mb_idx), ®s->iflag2);
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priv->write(FLEXCAN_IFLAG2_MB(priv->tx_mb_idx), ®s->iflag2);
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netif_wake_queue(dev);
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}
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@ -1298,7 +1298,7 @@ static int flexcan_open(struct net_device *dev)
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priv->tx_mb = flexcan_get_mb(priv, priv->tx_mb_idx);
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priv->reg_imask1_default = 0;
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priv->reg_imask2_default = FLEXCAN_IFLAG_MB(priv->tx_mb_idx);
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priv->reg_imask2_default = FLEXCAN_IFLAG2_MB(priv->tx_mb_idx);
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priv->offload.mailbox_read = flexcan_mailbox_read;
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