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ARM: dts: imx6q-b650v3: Add switch port configuration

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This adds support for the Marvell switch and names the network
ports according to the labels, that can be found next to the
connectors. The switch is connected to the host system using a
PCI based network card.

The PCI bus configuration has been written using the following
information:

root@b650v3# lspci -tv
-[0000:00]---00.0-[01]----00.0  Intel Corporation I210 Gigabit Network Connection
root@b650v3# lspci -nn
00:00.0 PCI bridge [0604]: Synopsys, Inc. Device [16c3:abcd] (rev 01)
01:00.0 Ethernet controller [0200]: Intel Corporation I210 Gigabit Network Connection [8086:1533] (rev 03)

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Sebastian Reichel 2018-01-23 16:03:49 +01:00 committed by David S. Miller
parent e6b22e4169
commit b2ea7f8332
1 changed files with 52 additions and 0 deletions
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52
arch/arm/boot/dts/imx6q-b650v3.dts
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@ -111,3 +111,55 @@ &usbphy1 {
fsl,tx-cal-45-dp-ohms = <55>;
fsl,tx-d-cal = <100>;
};
&pci_root {
/* Intel Corporation I210 Gigabit Network Connection */
switch_nic: ethernet@3,0 {
compatible = "pci8086,1533";
reg = <0x00010000 0 0 0 0>;
};
};
&switch_ports {
port@0 {
reg = <0>;
label = "enacq";
phy-handle = <&switchphy0>;
};
port@1 {
reg = <1>;
label = "eneport1";
phy-handle = <&switchphy1>;
};
port@2 {
reg = <2>;
label = "enix";
phy-handle = <&switchphy2>;
};
port@3 {
reg = <3>;
label = "enid";
phy-handle = <&switchphy3>;
};
port@4 {
reg = <4>;
label = "cpu";
ethernet = <&switch_nic>;
phy-handle = <&switchphy4>;
};
port@5 {
reg = <5>;
label = "enembc";
/* connected to Ethernet MAC of AT91RM9200 in MII mode */
fixed-link {
speed = <100>;
full-duplex;
};
};
};