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drm/amd/display: Only force modesets when toggling HDR
[Why] We can issue HDR static metadata as part of stream updates for non-modesets as long as we force a modeset when entering or exiting HDR. This avoids unnecessary blanking for simple metadata updates. [How] When changing scaling and abm for the stream also check if HDR has changed and send the stream update. This will only happen in non-modeset cases. Cc: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190528190836.10738-3-nicholas.kazlauskas@amd.com
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@ -3978,9 +3978,16 @@ amdgpu_dm_connector_atomic_check(struct drm_connector *conn,
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* DC considers the stream backends changed if the
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* static metadata changes. Forcing the modeset also
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* gives a simple way for userspace to switch from
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* 8bpc to 10bpc when setting the metadata.
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* 8bpc to 10bpc when setting the metadata to enter
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* or exit HDR.
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*
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* Changing the static metadata after it's been
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* set is permissible, however. So only force a
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* modeset if we're entering or exiting HDR.
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*/
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new_crtc_state->mode_changed = true;
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new_crtc_state->mode_changed =
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!old_con_state->hdr_output_metadata ||
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!new_con_state->hdr_output_metadata;
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}
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return 0;
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@ -5881,7 +5888,9 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state)
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struct amdgpu_crtc *acrtc = to_amdgpu_crtc(dm_new_con_state->base.crtc);
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struct dc_surface_update dummy_updates[MAX_SURFACES];
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struct dc_stream_update stream_update;
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struct dc_info_packet hdr_packet;
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struct dc_stream_status *status = NULL;
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bool abm_changed, hdr_changed, scaling_changed;
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memset(&dummy_updates, 0, sizeof(dummy_updates));
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memset(&stream_update, 0, sizeof(stream_update));
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@ -5898,11 +5907,19 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state)
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dm_new_crtc_state = to_dm_crtc_state(new_crtc_state);
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dm_old_crtc_state = to_dm_crtc_state(old_crtc_state);
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if (!is_scaling_state_different(dm_new_con_state, dm_old_con_state) &&
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(dm_new_crtc_state->abm_level == dm_old_crtc_state->abm_level))
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scaling_changed = is_scaling_state_different(dm_new_con_state,
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dm_old_con_state);
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abm_changed = dm_new_crtc_state->abm_level !=
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dm_old_crtc_state->abm_level;
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hdr_changed =
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is_hdr_metadata_different(old_con_state, new_con_state);
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if (!scaling_changed && !abm_changed && !hdr_changed)
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continue;
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if (is_scaling_state_different(dm_new_con_state, dm_old_con_state)) {
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if (scaling_changed) {
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update_stream_scaling_settings(&dm_new_con_state->base.crtc->mode,
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dm_new_con_state, (struct dc_stream_state *)dm_new_crtc_state->stream);
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@ -5910,12 +5927,17 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state)
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stream_update.dst = dm_new_crtc_state->stream->dst;
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}
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if (dm_new_crtc_state->abm_level != dm_old_crtc_state->abm_level) {
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if (abm_changed) {
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dm_new_crtc_state->stream->abm_level = dm_new_crtc_state->abm_level;
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stream_update.abm_level = &dm_new_crtc_state->abm_level;
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}
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if (hdr_changed) {
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fill_hdr_info_packet(new_con_state, &hdr_packet);
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stream_update.hdr_static_metadata = &hdr_packet;
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}
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status = dc_stream_get_status(dm_new_crtc_state->stream);
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WARN_ON(!status);
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WARN_ON(!status->plane_count);
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