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staging: xgifb: delete the driver
There has not been any real work done on cleaning this driver up and getting it out of the staging tree in years. Also, no new fb drivers are being added to the tree, so it should be converted into a drm driver as well. Due to the lack of interest in this codebase, just drop it. Cc: Arnaud Patard <arnaud.patard@rtp-net.org> Cc: Mauro Carvalho Chehab <mchehab+samsung@kernel.org> Reported-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Greg Kroah-Hartman
parent
9a41352614
commit
b1bd42aa72
@ -14471,11 +14471,6 @@ L: linux-wireless@vger.kernel.org
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S: Supported
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F: drivers/staging/wilc1000/
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STAGING - XGI Z7,Z9,Z11 PCI DISPLAY DRIVER
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M: Arnaud Patard <arnaud.patard@rtp-net.org>
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S: Odd Fixes
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F: drivers/staging/xgifb/
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STAGING SUBSYSTEM
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M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging.git
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@ -56,8 +56,6 @@ source "drivers/staging/iio/Kconfig"
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source "drivers/staging/sm750fb/Kconfig"
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source "drivers/staging/xgifb/Kconfig"
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source "drivers/staging/emxx_udc/Kconfig"
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source "drivers/staging/speakup/Kconfig"
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@ -20,7 +20,6 @@ obj-$(CONFIG_VT6656) += vt6656/
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obj-$(CONFIG_VME_BUS) += vme/
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obj-$(CONFIG_IIO) += iio/
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obj-$(CONFIG_FB_SM750) += sm750fb/
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obj-$(CONFIG_FB_XGI) += xgifb/
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obj-$(CONFIG_USB_EMXX) += emxx_udc/
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obj-$(CONFIG_SPEAKUP) += speakup/
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obj-$(CONFIG_MFD_NVEC) += nvec/
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@ -1,11 +0,0 @@
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config FB_XGI
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tristate "XGI display support"
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depends on FB && PCI
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select FB_CFB_FILLRECT
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select FB_CFB_COPYAREA
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select FB_CFB_IMAGEBLIT
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help
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This driver supports notebooks with XGI Z7,Z9,Z11 PCI chips.
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Say Y if you have such a graphics card.
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To compile this driver as a module, choose M here: the
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module will be called xgifb.ko
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@ -1,4 +0,0 @@
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obj-$(CONFIG_FB_XGI) += xgifb.o
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xgifb-y := XGI_main_26.o vb_init.o vb_setmode.o
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@ -1,16 +0,0 @@
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This drivers still needs a lot of work. I can list all cleanups to do but it's
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going to be long. So, I'm writing "cleanups" and not the list.
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Arnaud
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TODO:
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- clean ups
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- sort out dup ids with SiS driver
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- remove useless/wrong/unused code...
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- get rid of non-linux related stuff
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This needs to become a drm driver, the fbdev subsystem doesn't take new drivers
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anymore.
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Please send patches to:
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Arnaud Patard <arnaud.patard@rtp-net.org>
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@ -1,365 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _XGIFB_MAIN
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#define _XGIFB_MAIN
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/* ------------------- Constant Definitions ------------------------- */
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#include "XGIfb.h"
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#include "vb_def.h"
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#define PCI_DEVICE_ID_XGI_42 0x042
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#define PCI_DEVICE_ID_XGI_27 0x027
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static const struct pci_device_id xgifb_pci_table[] = {
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{PCI_DEVICE(PCI_VENDOR_ID_XGI, PCI_DEVICE_ID_XGI_20)},
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{PCI_DEVICE(PCI_VENDOR_ID_XGI, PCI_DEVICE_ID_XGI_27)},
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{PCI_DEVICE(PCI_VENDOR_ID_XGI, PCI_DEVICE_ID_XGI_40)},
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{PCI_DEVICE(PCI_VENDOR_ID_XGI, PCI_DEVICE_ID_XGI_42)},
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{0}
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};
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MODULE_DEVICE_TABLE(pci, xgifb_pci_table);
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#define IND_XGI_SCRATCH_REG_CR30 0x30 /* CRs */
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#define IND_XGI_SCRATCH_REG_CR31 0x31
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#define IND_XGI_SCRATCH_REG_CR32 0x32
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#define IND_XGI_SCRATCH_REG_CR33 0x33
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#define IND_XGI_LCD_PANEL 0x36
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#define IND_XGI_SCRATCH_REG_CR37 0x37
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#define XGI_DRAM_SIZE_MASK 0xF0 /*SR14 */
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#define XGI_DRAM_SIZE_1MB 0x00
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#define XGI_DRAM_SIZE_2MB 0x01
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#define XGI_DRAM_SIZE_4MB 0x02
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#define XGI_DRAM_SIZE_8MB 0x03
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#define XGI_DRAM_SIZE_16MB 0x04
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#define XGI_DRAM_SIZE_32MB 0x05
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#define XGI_DRAM_SIZE_64MB 0x06
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#define XGI_DRAM_SIZE_128MB 0x07
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#define XGI_DRAM_SIZE_256MB 0x08
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/* ------------------- Global Variables ----------------------------- */
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/* display status */
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static int XGIfb_crt1off;
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static int XGIfb_forcecrt1 = -1;
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/* global flags */
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static int XGIfb_tvmode;
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static int enable_dstn;
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static int XGIfb_ypan = -1;
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/* TW: CRT2 type (for overriding autodetection) */
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static int XGIfb_crt2type = -1;
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/* PR: Tv plug type (for overriding autodetection) */
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static int XGIfb_tvplug = -1;
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#define MD_XGI315 1
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/* mode table */
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static const struct _XGIbios_mode {
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u8 mode_no;
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u16 vesa_mode_no_1; /* "XGI defined" VESA mode number */
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u16 vesa_mode_no_2; /* Real VESA mode numbers */
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u16 xres;
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u16 yres;
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u16 bpp;
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u8 chipset;
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} XGIbios_mode[] = {
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{ 0x56, 0x0000, 0x0000, 320, 240, 16, MD_XGI315 },
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{ 0x5A, 0x0000, 0x0000, 320, 480, 8, MD_XGI315 },
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{ 0x5B, 0x0000, 0x0000, 320, 480, 16, MD_XGI315 },
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{ 0x2E, 0x0101, 0x0101, 640, 480, 8, MD_XGI315 },
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{ 0x44, 0x0111, 0x0111, 640, 480, 16, MD_XGI315 },
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{ 0x62, 0x013a, 0x0112, 640, 480, 32, MD_XGI315 },
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{ 0x31, 0x0000, 0x0000, 720, 480, 8, MD_XGI315 },
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{ 0x33, 0x0000, 0x0000, 720, 480, 16, MD_XGI315 },
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{ 0x35, 0x0000, 0x0000, 720, 480, 32, MD_XGI315 },
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{ 0x32, 0x0000, 0x0000, 720, 576, 8, MD_XGI315 },
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{ 0x34, 0x0000, 0x0000, 720, 576, 16, MD_XGI315 },
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{ 0x36, 0x0000, 0x0000, 720, 576, 32, MD_XGI315 },
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{ 0x36, 0x0000, 0x0000, 720, 576, 32, MD_XGI315 },
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{ 0x70, 0x0000, 0x0000, 800, 480, 8, MD_XGI315 },
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{ 0x7a, 0x0000, 0x0000, 800, 480, 16, MD_XGI315 },
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{ 0x76, 0x0000, 0x0000, 800, 480, 32, MD_XGI315 },
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{ 0x30, 0x0103, 0x0103, 800, 600, 8, MD_XGI315 },
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#define DEFAULT_MODE 17 /* index for 800x600x16 */
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{ 0x47, 0x0114, 0x0114, 800, 600, 16, MD_XGI315 },
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{ 0x63, 0x013b, 0x0115, 800, 600, 32, MD_XGI315 },
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{ 0x71, 0x0000, 0x0000, 1024, 576, 8, MD_XGI315 },
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{ 0x74, 0x0000, 0x0000, 1024, 576, 16, MD_XGI315 },
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{ 0x77, 0x0000, 0x0000, 1024, 576, 32, MD_XGI315 },
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{ 0x77, 0x0000, 0x0000, 1024, 576, 32, MD_XGI315 },
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{ 0x20, 0x0000, 0x0000, 1024, 600, 8, },
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{ 0x21, 0x0000, 0x0000, 1024, 600, 16, },
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{ 0x22, 0x0000, 0x0000, 1024, 600, 32, },
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{ 0x38, 0x0105, 0x0105, 1024, 768, 8, MD_XGI315 },
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{ 0x4A, 0x0117, 0x0117, 1024, 768, 16, MD_XGI315 },
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{ 0x64, 0x013c, 0x0118, 1024, 768, 32, MD_XGI315 },
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{ 0x64, 0x013c, 0x0118, 1024, 768, 32, MD_XGI315 },
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{ 0x23, 0x0000, 0x0000, 1152, 768, 8, },
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{ 0x24, 0x0000, 0x0000, 1152, 768, 16, },
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{ 0x25, 0x0000, 0x0000, 1152, 768, 32, },
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{ 0x79, 0x0000, 0x0000, 1280, 720, 8, MD_XGI315 },
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{ 0x75, 0x0000, 0x0000, 1280, 720, 16, MD_XGI315 },
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{ 0x78, 0x0000, 0x0000, 1280, 720, 32, MD_XGI315 },
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{ 0x23, 0x0000, 0x0000, 1280, 768, 8, MD_XGI315 },
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{ 0x24, 0x0000, 0x0000, 1280, 768, 16, MD_XGI315 },
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{ 0x25, 0x0000, 0x0000, 1280, 768, 32, MD_XGI315 },
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{ 0x7C, 0x0000, 0x0000, 1280, 960, 8, MD_XGI315 },
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{ 0x7D, 0x0000, 0x0000, 1280, 960, 16, MD_XGI315 },
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{ 0x7E, 0x0000, 0x0000, 1280, 960, 32, MD_XGI315 },
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{ 0x3A, 0x0107, 0x0107, 1280, 1024, 8, MD_XGI315 },
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{ 0x4D, 0x011a, 0x011a, 1280, 1024, 16, MD_XGI315 },
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{ 0x65, 0x013d, 0x011b, 1280, 1024, 32, MD_XGI315 },
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{ 0x26, 0x0000, 0x0000, 1400, 1050, 8, MD_XGI315 },
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{ 0x27, 0x0000, 0x0000, 1400, 1050, 16, MD_XGI315 },
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{ 0x28, 0x0000, 0x0000, 1400, 1050, 32, MD_XGI315 },
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{ 0x3C, 0x0130, 0x011c, 1600, 1200, 8, MD_XGI315 },
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{ 0x3D, 0x0131, 0x011e, 1600, 1200, 16, MD_XGI315 },
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{ 0x66, 0x013e, 0x011f, 1600, 1200, 32, MD_XGI315 },
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{ 0x68, 0x013f, 0x0000, 1920, 1440, 8, MD_XGI315 },
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{ 0x69, 0x0140, 0x0000, 1920, 1440, 16, MD_XGI315 },
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{ 0x6B, 0x0141, 0x0000, 1920, 1440, 32, MD_XGI315 },
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{ 0x6c, 0x0000, 0x0000, 2048, 1536, 8, MD_XGI315 },
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{ 0x6d, 0x0000, 0x0000, 2048, 1536, 16, MD_XGI315 },
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{ 0x6e, 0x0000, 0x0000, 2048, 1536, 32, MD_XGI315 },
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{ 0 },
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};
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static const unsigned short XGI310paneltype[] = {
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LCD_UNKNOWN, LCD_800x600, LCD_1024x768, LCD_1280x1024,
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LCD_640x480, LCD_1024x600, LCD_1152x864, LCD_1280x960,
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LCD_1152x768, LCD_1400x1050, LCD_1280x768, LCD_1600x1200,
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LCD_1024x768, LCD_1024x768, LCD_1024x768};
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static const struct _XGI_crt2type {
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char name[10];
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int type_no;
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int tvplug_no;
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} XGI_crt2type[] = {
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{"NONE", 0, -1},
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{"LCD", XGIFB_DISP_LCD, -1},
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{"TV", XGIFB_DISP_TV, -1},
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{"VGA", XGIFB_DISP_CRT, -1},
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{"SVIDEO", XGIFB_DISP_TV, TVPLUG_SVIDEO},
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{"COMPOSITE", XGIFB_DISP_TV, TVPLUG_COMPOSITE},
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{"SCART", XGIFB_DISP_TV, TVPLUG_SCART},
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{"none", 0, -1},
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{"lcd", XGIFB_DISP_LCD, -1},
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{"tv", XGIFB_DISP_TV, -1},
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{"vga", XGIFB_DISP_CRT, -1},
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{"svideo", XGIFB_DISP_TV, TVPLUG_SVIDEO},
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{"composite", XGIFB_DISP_TV, TVPLUG_COMPOSITE},
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{"scart", XGIFB_DISP_TV, TVPLUG_SCART},
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{"\0", -1, -1}
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};
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/* TV standard */
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static const struct _XGI_tvtype {
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char name[6];
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int type_no;
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} XGI_tvtype[] = {
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{"PAL", 1},
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{"NTSC", 2},
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{"pal", 1},
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{"ntsc", 2},
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{"\0", -1}
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};
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static const struct _XGI_vrate {
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u16 idx;
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u16 xres;
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u16 yres;
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u16 refresh;
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} XGIfb_vrate[] = {
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{1, 640, 480, 60}, {2, 640, 480, 72},
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{3, 640, 480, 75}, {4, 640, 480, 85},
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{5, 640, 480, 100}, {6, 640, 480, 120},
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{7, 640, 480, 160}, {8, 640, 480, 200},
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{1, 720, 480, 60},
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{1, 720, 576, 58},
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{1, 800, 480, 60}, {2, 800, 480, 75}, {3, 800, 480, 85},
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{1, 800, 600, 60}, {2, 800, 600, 72}, {3, 800, 600, 75},
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{4, 800, 600, 85}, {5, 800, 600, 100},
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{6, 800, 600, 120}, {7, 800, 600, 160},
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{1, 1024, 768, 60}, {2, 1024, 768, 70}, {3, 1024, 768, 75},
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{4, 1024, 768, 85}, {5, 1024, 768, 100}, {6, 1024, 768, 120},
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{1, 1024, 576, 60}, {2, 1024, 576, 75}, {3, 1024, 576, 85},
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{1, 1024, 600, 60},
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{1, 1152, 768, 60},
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{1, 1280, 720, 60}, {2, 1280, 720, 75}, {3, 1280, 720, 85},
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{1, 1280, 768, 60},
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{1, 1280, 1024, 60}, {2, 1280, 1024, 75}, {3, 1280, 1024, 85},
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{1, 1280, 960, 70},
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{1, 1400, 1050, 60},
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{1, 1600, 1200, 60}, {2, 1600, 1200, 65},
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{3, 1600, 1200, 70}, {4, 1600, 1200, 75},
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{5, 1600, 1200, 85}, {6, 1600, 1200, 100},
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{7, 1600, 1200, 120},
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{1, 1920, 1440, 60}, {2, 1920, 1440, 65},
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{3, 1920, 1440, 70}, {4, 1920, 1440, 75},
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{5, 1920, 1440, 85}, {6, 1920, 1440, 100},
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{1, 2048, 1536, 60}, {2, 2048, 1536, 65},
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{3, 2048, 1536, 70}, {4, 2048, 1536, 75},
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{5, 2048, 1536, 85},
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{0, 0, 0, 0}
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};
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static const struct _XGI_TV_filter {
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u8 filter[9][4];
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} XGI_TV_filter[] = {
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{ { {0x00, 0x00, 0x00, 0x40}, /* NTSCFilter_0 */
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{0x00, 0xE0, 0x10, 0x60},
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{0x00, 0xEE, 0x10, 0x44},
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{0x00, 0xF4, 0x10, 0x38},
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{0xF8, 0xF4, 0x18, 0x38},
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{0xFC, 0xFB, 0x14, 0x2A},
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{0x00, 0x00, 0x10, 0x20},
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{0x00, 0x04, 0x10, 0x18},
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{0xFF, 0xFF, 0xFF, 0xFF} } },
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{ { {0x00, 0x00, 0x00, 0x40}, /* NTSCFilter_1 */
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{0x00, 0xE0, 0x10, 0x60},
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{0x00, 0xEE, 0x10, 0x44},
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{0x00, 0xF4, 0x10, 0x38},
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{0xF8, 0xF4, 0x18, 0x38},
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{0xFC, 0xFB, 0x14, 0x2A},
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{0x00, 0x00, 0x10, 0x20},
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{0x00, 0x04, 0x10, 0x18},
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{0xFF, 0xFF, 0xFF, 0xFF} } },
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{ { {0x00, 0x00, 0x00, 0x40}, /* NTSCFilter_2 */
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{0xF5, 0xEE, 0x1B, 0x44},
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{0xF8, 0xF4, 0x18, 0x38},
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{0xEB, 0x04, 0x25, 0x18},
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{0xF1, 0x05, 0x1F, 0x16},
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{0xF6, 0x06, 0x1A, 0x14},
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{0xFA, 0x06, 0x16, 0x14},
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{0x00, 0x04, 0x10, 0x18},
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{0xFF, 0xFF, 0xFF, 0xFF} } },
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{ { {0x00, 0x00, 0x00, 0x40}, /* NTSCFilter_3 */
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{0xF1, 0x04, 0x1F, 0x18},
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{0xEE, 0x0D, 0x22, 0x06},
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{0xF7, 0x06, 0x19, 0x14},
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{0xF4, 0x0B, 0x1C, 0x0A},
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{0xFA, 0x07, 0x16, 0x12},
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{0xF9, 0x0A, 0x17, 0x0C},
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{0x00, 0x07, 0x10, 0x12},
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{0xFF, 0xFF, 0xFF, 0xFF} } },
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{ { {0x00, 0x00, 0x00, 0x40}, /* NTSCFilter_4 */
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{0x00, 0xE0, 0x10, 0x60},
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{0x00, 0xEE, 0x10, 0x44},
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{0x00, 0xF4, 0x10, 0x38},
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{0xF8, 0xF4, 0x18, 0x38},
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{0xFC, 0xFB, 0x14, 0x2A},
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{0x00, 0x00, 0x10, 0x20},
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{0x00, 0x04, 0x10, 0x18},
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{0xFF, 0xFF, 0xFF, 0xFF} } },
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{ { {0x00, 0x00, 0x00, 0x40}, /* NTSCFilter_5 */
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{0xF5, 0xEE, 0x1B, 0x44},
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{0xF8, 0xF4, 0x18, 0x38},
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{0xEB, 0x04, 0x25, 0x18},
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{0xF1, 0x05, 0x1F, 0x16},
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{0xF6, 0x06, 0x1A, 0x14},
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{0xFA, 0x06, 0x16, 0x14},
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{0x00, 0x04, 0x10, 0x18},
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||||
{0xFF, 0xFF, 0xFF, 0xFF} } },
|
||||
{ { {0x00, 0x00, 0x00, 0x40}, /* NTSCFilter_6 */
|
||||
{0xEB, 0x04, 0x25, 0x18},
|
||||
{0xE7, 0x0E, 0x29, 0x04},
|
||||
{0xEE, 0x0C, 0x22, 0x08},
|
||||
{0xF6, 0x0B, 0x1A, 0x0A},
|
||||
{0xF9, 0x0A, 0x17, 0x0C},
|
||||
{0xFC, 0x0A, 0x14, 0x0C},
|
||||
{0x00, 0x08, 0x10, 0x10},
|
||||
{0xFF, 0xFF, 0xFF, 0xFF} } },
|
||||
{ { {0x00, 0x00, 0x00, 0x40}, /* NTSCFilter_7 */
|
||||
{0xEC, 0x02, 0x24, 0x1C},
|
||||
{0xF2, 0x04, 0x1E, 0x18},
|
||||
{0xEB, 0x15, 0x25, 0xF6},
|
||||
{0xF4, 0x10, 0x1C, 0x00},
|
||||
{0xF8, 0x0F, 0x18, 0x02},
|
||||
{0x00, 0x04, 0x10, 0x18},
|
||||
{0x01, 0x06, 0x0F, 0x14},
|
||||
{0xFF, 0xFF, 0xFF, 0xFF} } },
|
||||
{ { {0x00, 0x00, 0x00, 0x40}, /* PALFilter_0 */
|
||||
{0x00, 0xE0, 0x10, 0x60},
|
||||
{0x00, 0xEE, 0x10, 0x44},
|
||||
{0x00, 0xF4, 0x10, 0x38},
|
||||
{0xF8, 0xF4, 0x18, 0x38},
|
||||
{0xFC, 0xFB, 0x14, 0x2A},
|
||||
{0x00, 0x00, 0x10, 0x20},
|
||||
{0x00, 0x04, 0x10, 0x18},
|
||||
{0xFF, 0xFF, 0xFF, 0xFF} } },
|
||||
{ { {0x00, 0x00, 0x00, 0x40}, /* PALFilter_1 */
|
||||
{0x00, 0xE0, 0x10, 0x60},
|
||||
{0x00, 0xEE, 0x10, 0x44},
|
||||
{0x00, 0xF4, 0x10, 0x38},
|
||||
{0xF8, 0xF4, 0x18, 0x38},
|
||||
{0xFC, 0xFB, 0x14, 0x2A},
|
||||
{0x00, 0x00, 0x10, 0x20},
|
||||
{0x00, 0x04, 0x10, 0x18},
|
||||
{0xFF, 0xFF, 0xFF, 0xFF} } },
|
||||
{ { {0x00, 0x00, 0x00, 0x40}, /* PALFilter_2 */
|
||||
{0xF5, 0xEE, 0x1B, 0x44},
|
||||
{0xF8, 0xF4, 0x18, 0x38},
|
||||
{0xF1, 0xF7, 0x01, 0x32},
|
||||
{0xF5, 0xFB, 0x1B, 0x2A},
|
||||
{0xF9, 0xFF, 0x17, 0x22},
|
||||
{0xFB, 0x01, 0x15, 0x1E},
|
||||
{0x00, 0x04, 0x10, 0x18},
|
||||
{0xFF, 0xFF, 0xFF, 0xFF} } },
|
||||
{ { {0x00, 0x00, 0x00, 0x40}, /* PALFilter_3 */
|
||||
{0xF5, 0xFB, 0x1B, 0x2A},
|
||||
{0xEE, 0xFE, 0x22, 0x24},
|
||||
{0xF3, 0x00, 0x1D, 0x20},
|
||||
{0xF9, 0x03, 0x17, 0x1A},
|
||||
{0xFB, 0x02, 0x14, 0x1E},
|
||||
{0xFB, 0x04, 0x15, 0x18},
|
||||
{0x00, 0x06, 0x10, 0x14},
|
||||
{0xFF, 0xFF, 0xFF, 0xFF} } },
|
||||
{ { {0x00, 0x00, 0x00, 0x40}, /* PALFilter_4 */
|
||||
{0x00, 0xE0, 0x10, 0x60},
|
||||
{0x00, 0xEE, 0x10, 0x44},
|
||||
{0x00, 0xF4, 0x10, 0x38},
|
||||
{0xF8, 0xF4, 0x18, 0x38},
|
||||
{0xFC, 0xFB, 0x14, 0x2A},
|
||||
{0x00, 0x00, 0x10, 0x20},
|
||||
{0x00, 0x04, 0x10, 0x18},
|
||||
{0xFF, 0xFF, 0xFF, 0xFF} } },
|
||||
{ { {0x00, 0x00, 0x00, 0x40}, /* PALFilter_5 */
|
||||
{0xF5, 0xEE, 0x1B, 0x44},
|
||||
{0xF8, 0xF4, 0x18, 0x38},
|
||||
{0xF1, 0xF7, 0x1F, 0x32},
|
||||
{0xF5, 0xFB, 0x1B, 0x2A},
|
||||
{0xF9, 0xFF, 0x17, 0x22},
|
||||
{0xFB, 0x01, 0x15, 0x1E},
|
||||
{0x00, 0x04, 0x10, 0x18},
|
||||
{0xFF, 0xFF, 0xFF, 0xFF} } },
|
||||
{ { {0x00, 0x00, 0x00, 0x40}, /* PALFilter_6 */
|
||||
{0xF5, 0xEE, 0x1B, 0x2A},
|
||||
{0xEE, 0xFE, 0x22, 0x24},
|
||||
{0xF3, 0x00, 0x1D, 0x20},
|
||||
{0xF9, 0x03, 0x17, 0x1A},
|
||||
{0xFB, 0x02, 0x14, 0x1E},
|
||||
{0xFB, 0x04, 0x15, 0x18},
|
||||
{0x00, 0x06, 0x10, 0x14},
|
||||
{0xFF, 0xFF, 0xFF, 0xFF} } },
|
||||
{ { {0x00, 0x00, 0x00, 0x40}, /* PALFilter_7 */
|
||||
{0xF5, 0xEE, 0x1B, 0x44},
|
||||
{0xF8, 0xF4, 0x18, 0x38},
|
||||
{0xFC, 0xFB, 0x14, 0x2A},
|
||||
{0xEB, 0x05, 0x25, 0x16},
|
||||
{0xF1, 0x05, 0x1F, 0x16},
|
||||
{0xFA, 0x07, 0x16, 0x12},
|
||||
{0x00, 0x07, 0x10, 0x12},
|
||||
{0xFF, 0xFF, 0xFF, 0xFF} } }
|
||||
};
|
||||
|
||||
static int filter = -1;
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,109 +0,0 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
#ifndef _LINUX_XGIFB
|
||||
#define _LINUX_XGIFB
|
||||
#include "vgatypes.h"
|
||||
#include "vb_struct.h"
|
||||
|
||||
enum xgifb_display_type {
|
||||
XGIFB_DISP_NONE = 0,
|
||||
XGIFB_DISP_CRT,
|
||||
XGIFB_DISP_LCD,
|
||||
XGIFB_DISP_TV,
|
||||
};
|
||||
|
||||
#define HASVB_NONE 0x00
|
||||
#define HASVB_301 0x01
|
||||
#define HASVB_LVDS 0x02
|
||||
#define HASVB_TRUMPION 0x04
|
||||
#define HASVB_LVDS_CHRONTEL 0x10
|
||||
#define HASVB_302 0x20
|
||||
#define HASVB_CHRONTEL 0x80
|
||||
|
||||
enum XGI_CHIP_TYPE {
|
||||
XG40 = 32,
|
||||
XG42,
|
||||
XG20 = 48,
|
||||
XG21,
|
||||
XG27,
|
||||
};
|
||||
|
||||
enum xgi_tvtype {
|
||||
TVMODE_NTSC = 0,
|
||||
TVMODE_PAL,
|
||||
TVMODE_HIVISION,
|
||||
TVTYPE_PALM,
|
||||
TVTYPE_PALN,
|
||||
TVTYPE_NTSCJ,
|
||||
TVMODE_TOTAL
|
||||
};
|
||||
|
||||
enum xgi_tv_plug {
|
||||
TVPLUG_UNKNOWN = 0,
|
||||
TVPLUG_COMPOSITE = 1,
|
||||
TVPLUG_SVIDEO = 2,
|
||||
TVPLUG_COMPOSITE_AND_SVIDEO = 3,
|
||||
TVPLUG_SCART = 4,
|
||||
TVPLUG_YPBPR_525i = 5,
|
||||
TVPLUG_YPBPR_525P = 6,
|
||||
TVPLUG_YPBPR_750P = 7,
|
||||
TVPLUG_YPBPR_1080i = 8,
|
||||
TVPLUG_TOTAL
|
||||
};
|
||||
|
||||
struct xgifb_video_info {
|
||||
struct fb_info *fb_info;
|
||||
struct xgi_hw_device_info hw_info;
|
||||
struct vb_device_info dev_info;
|
||||
|
||||
int mode_idx;
|
||||
int rate_idx;
|
||||
|
||||
u32 pseudo_palette[17];
|
||||
|
||||
int chip_id;
|
||||
unsigned int video_size;
|
||||
phys_addr_t video_base;
|
||||
void __iomem *video_vbase;
|
||||
phys_addr_t mmio_base;
|
||||
unsigned long mmio_size;
|
||||
void __iomem *mmio_vbase;
|
||||
unsigned long vga_base;
|
||||
int mtrr;
|
||||
|
||||
int video_bpp;
|
||||
int video_cmap_len;
|
||||
int video_width;
|
||||
int video_height;
|
||||
int video_vwidth;
|
||||
int video_vheight;
|
||||
int org_x;
|
||||
int org_y;
|
||||
int video_linelength;
|
||||
unsigned int refresh_rate;
|
||||
|
||||
enum xgifb_display_type display2; /* the second display output type */
|
||||
bool display2_force;
|
||||
unsigned char hasVB;
|
||||
unsigned char TV_type;
|
||||
unsigned char TV_plug;
|
||||
|
||||
struct XGI21_LVDSCapStruct lvds_data;
|
||||
|
||||
enum XGI_CHIP_TYPE chip;
|
||||
unsigned char revision_id;
|
||||
|
||||
unsigned short DstColor;
|
||||
unsigned long XGI310_AccelDepth;
|
||||
unsigned long CommandReg;
|
||||
|
||||
unsigned int pcibus;
|
||||
unsigned int pcislot;
|
||||
unsigned int pcifunc;
|
||||
|
||||
unsigned short subsysvendor;
|
||||
unsigned short subsysdevice;
|
||||
|
||||
char reserved[236];
|
||||
};
|
||||
|
||||
#endif
|
||||
@ -1,257 +0,0 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
#ifndef _VB_DEF_
|
||||
#define _VB_DEF_
|
||||
#include "../../video/fbdev/sis/initdef.h"
|
||||
|
||||
#define VB_XGI301C 0x0020 /* for 301C */
|
||||
|
||||
#define SupportCRT2in301C 0x0100 /* for 301C */
|
||||
#define SetCHTVOverScan 0x8000
|
||||
|
||||
#define PanelResInfo 0x1F /* CR36 Panel Type/LCDResInfo */
|
||||
#define Panel_1024x768x75 0x22
|
||||
#define Panel_1280x1024x75 0x23
|
||||
|
||||
#define PanelRef60Hz 0x00
|
||||
#define PanelRef75Hz 0x20
|
||||
|
||||
#define YPbPr525iVCLK 0x03B
|
||||
#define YPbPr525iVCLK_2 0x03A
|
||||
|
||||
#define XGI_CRT2_PORT_00 (0x00 - 0x030)
|
||||
|
||||
#define SupportAllCRT2 0x0078
|
||||
#define NoSupportTV 0x0070
|
||||
#define NoSupportHiVisionTV 0x0060
|
||||
#define NoSupportLCD 0x0058
|
||||
|
||||
/* -------------- SetMode Stack/Scratch */
|
||||
#define XGI_SetCRT2ToLCDA 0x0100
|
||||
#define SetCRT2ToDualEdge 0x8000
|
||||
|
||||
#define ReserveTVOption 0x0008
|
||||
|
||||
#define SetTVLowResolution 0x0400
|
||||
#define TVSimuMode 0x0800
|
||||
#define RPLLDIV2XO 0x1000
|
||||
#define NTSC1024x768 0x2000
|
||||
#define SetTVLockMode 0x4000
|
||||
|
||||
#define XGI_LCDVESATiming 0x0001 /* LCD Info/CR37 */
|
||||
#define XGI_EnableLVDSDDA 0x0002
|
||||
#define EnableScalingLCD 0x0008
|
||||
#define SetPWDEnable 0x0004
|
||||
#define SetLCDtoNonExpanding 0x0010
|
||||
#define SetLCDDualLink 0x0100
|
||||
#define SetLCDLowResolution 0x0200
|
||||
|
||||
/* LCD Capability shampoo */
|
||||
#define DefaultLCDCap 0x80ea
|
||||
#define EnableLCD24bpp 0x0004 /* default */
|
||||
#define LCDPolarity 0x00c0 /* default: SyncNN */
|
||||
#define XGI_LCDDualLink 0x0100
|
||||
#define EnableSpectrum 0x0200
|
||||
#define PWDEnable 0x0400
|
||||
#define EnableVBCLKDRVLOW 0x4000
|
||||
#define EnablePLLSPLOW 0x8000
|
||||
|
||||
#define AVIDEOSense 0x01 /* CR32 */
|
||||
#define SVIDEOSense 0x02
|
||||
#define SCARTSense 0x04
|
||||
#define LCDSense 0x08
|
||||
#define Monitor2Sense 0x10
|
||||
#define Monitor1Sense 0x20
|
||||
#define HiTVSense 0x40
|
||||
|
||||
#define YPbPrSense 0x80 /* NEW SCRATCH */
|
||||
|
||||
#define TVSense 0xc7
|
||||
|
||||
#define YPbPrMode 0xe0
|
||||
#define YPbPrMode525i 0x00
|
||||
#define YPbPrMode525p 0x20
|
||||
#define YPbPrMode750p 0x40
|
||||
#define YPbPrMode1080i 0x60
|
||||
|
||||
#define ScalingLCD 0x08
|
||||
|
||||
#define SetYPbPr 0x04
|
||||
|
||||
/* ---------------------- VUMA Information */
|
||||
#define DisplayDeviceFromCMOS 0x10
|
||||
|
||||
/* ---------------------- HK Evnet Definition */
|
||||
#define XGI_ModeSwitchStatus 0xf0
|
||||
#define ActiveCRT1 0x10
|
||||
#define ActiveLCD 0x0020
|
||||
#define ActiveTV 0x40
|
||||
#define ActiveCRT2 0x80
|
||||
|
||||
#define ActiveAVideo 0x01
|
||||
#define ActiveSVideo 0x02
|
||||
#define ActiveSCART 0x04
|
||||
#define ActiveHiTV 0x08
|
||||
#define ActiveYPbPr 0x10
|
||||
|
||||
#define NTSC1024x768HT 1908
|
||||
|
||||
#define YPbPrTV525iHT 1716 /* YPbPr */
|
||||
#define YPbPrTV525iVT 525
|
||||
#define YPbPrTV525pHT 1716
|
||||
#define YPbPrTV525pVT 525
|
||||
#define YPbPrTV750pHT 1650
|
||||
#define YPbPrTV750pVT 750
|
||||
|
||||
#define VCLK25_175 0x00
|
||||
#define VCLK28_322 0x01
|
||||
#define VCLK31_5 0x02
|
||||
#define VCLK36 0x03
|
||||
#define VCLK43_163 0x05
|
||||
#define VCLK44_9 0x06
|
||||
#define VCLK49_5 0x07
|
||||
#define VCLK50 0x08
|
||||
#define VCLK52_406 0x09
|
||||
#define VCLK56_25 0x0A
|
||||
#define VCLK68_179 0x0D
|
||||
#define VCLK72_852 0x0E
|
||||
#define VCLK75 0x0F
|
||||
#define VCLK78_75 0x11
|
||||
#define VCLK79_411 0x12
|
||||
#define VCLK83_95 0x13
|
||||
#define VCLK86_6 0x15
|
||||
#define VCLK94_5 0x16
|
||||
#define VCLK113_309 0x1B
|
||||
#define VCLK116_406 0x1C
|
||||
#define VCLK135_5 0x1E
|
||||
#define VCLK139_054 0x1F
|
||||
#define VCLK157_5 0x20
|
||||
#define VCLK162 0x21
|
||||
#define VCLK175 0x22
|
||||
#define VCLK189 0x23
|
||||
#define VCLK202_5 0x25
|
||||
#define VCLK229_5 0x26
|
||||
#define VCLK234 0x27
|
||||
#define VCLK254_817 0x29
|
||||
#define VCLK266_952 0x2B
|
||||
#define VCLK269_655 0x2C
|
||||
#define VCLK277_015 0x2E
|
||||
#define VCLK291_132 0x30
|
||||
#define VCLK291_766 0x31
|
||||
#define VCLK315_195 0x33
|
||||
#define VCLK323_586 0x34
|
||||
#define VCLK330_615 0x35
|
||||
#define VCLK340_477 0x37
|
||||
#define VCLK375_847 0x38
|
||||
#define VCLK388_631 0x39
|
||||
#define VCLK125_999 0x51
|
||||
#define VCLK148_5 0x52
|
||||
#define VCLK217_325 0x55
|
||||
#define XGI_YPbPr750pVCLK 0x57
|
||||
|
||||
#define VCLK39_77 0x40
|
||||
#define YPbPr525pVCLK 0x3A
|
||||
#define NTSC1024VCLK 0x41
|
||||
#define VCLK35_2 0x49 /* ; 800x480 */
|
||||
#define VCLK122_61 0x4A
|
||||
#define VCLK80_350 0x4B
|
||||
#define VCLK107_385 0x4C
|
||||
|
||||
#define RES320x200 0x00
|
||||
#define RES320x240 0x01
|
||||
#define RES400x300 0x02
|
||||
#define RES512x384 0x03
|
||||
#define RES640x400 0x04
|
||||
#define RES640x480x60 0x05
|
||||
#define RES640x480x72 0x06
|
||||
#define RES640x480x75 0x07
|
||||
#define RES640x480x85 0x08
|
||||
#define RES640x480x100 0x09
|
||||
#define RES640x480x120 0x0A
|
||||
#define RES640x480x160 0x0B
|
||||
#define RES640x480x200 0x0C
|
||||
#define RES800x600x56 0x0D
|
||||
#define RES800x600x60 0x0E
|
||||
#define RES800x600x72 0x0F
|
||||
#define RES800x600x75 0x10
|
||||
#define RES800x600x85 0x11
|
||||
#define RES800x600x100 0x12
|
||||
#define RES800x600x120 0x13
|
||||
#define RES800x600x160 0x14
|
||||
#define RES1024x768x43 0x15
|
||||
#define RES1024x768x60 0x16
|
||||
#define RES1024x768x70 0x17
|
||||
#define RES1024x768x75 0x18
|
||||
#define RES1024x768x85 0x19
|
||||
#define RES1024x768x100 0x1A
|
||||
#define RES1024x768x120 0x1B
|
||||
#define RES1280x1024x43 0x1C
|
||||
#define RES1280x1024x60 0x1D
|
||||
#define RES1280x1024x75 0x1E
|
||||
#define RES1280x1024x85 0x1F
|
||||
#define RES1600x1200x60 0x20
|
||||
#define RES1600x1200x65 0x21
|
||||
#define RES1600x1200x70 0x22
|
||||
#define RES1600x1200x75 0x23
|
||||
#define RES1600x1200x85 0x24
|
||||
#define RES1600x1200x100 0x25
|
||||
#define RES1600x1200x120 0x26
|
||||
#define RES1920x1440x60 0x27
|
||||
#define RES1920x1440x65 0x28
|
||||
#define RES1920x1440x70 0x29
|
||||
#define RES1920x1440x75 0x2A
|
||||
#define RES1920x1440x85 0x2B
|
||||
#define RES1920x1440x100 0x2C
|
||||
#define RES2048x1536x60 0x2D
|
||||
#define RES2048x1536x65 0x2E
|
||||
#define RES2048x1536x70 0x2F
|
||||
#define RES2048x1536x75 0x30
|
||||
#define RES2048x1536x85 0x31
|
||||
#define RES800x480x60 0x32
|
||||
#define RES800x480x75 0x33
|
||||
#define RES800x480x85 0x34
|
||||
#define RES1024x576x60 0x35
|
||||
#define RES1024x576x75 0x36
|
||||
#define RES1024x576x85 0x37
|
||||
#define RES1280x720x60 0x38
|
||||
#define RES1280x720x75 0x39
|
||||
#define RES1280x720x85 0x3A
|
||||
#define RES1280x960x60 0x3B
|
||||
#define RES720x480x60 0x3C
|
||||
#define RES720x576x56 0x3D
|
||||
#define RES856x480x79I 0x3E
|
||||
#define RES856x480x60 0x3F
|
||||
#define RES1280x768x60 0x40
|
||||
#define RES1400x1050x60 0x41
|
||||
#define RES1152x864x60 0x42
|
||||
#define RES1152x864x75 0x43
|
||||
#define RES1024x768x160 0x44
|
||||
#define RES1280x960x75 0x45
|
||||
#define RES1280x960x85 0x46
|
||||
#define RES1280x960x120 0x47
|
||||
|
||||
#define XG27_CR8F 0x0C
|
||||
#define XG27_SR36 0x30
|
||||
#define XG27_SR40 0x04
|
||||
#define XG27_SR41 0x00
|
||||
#define XG40_CRCF 0x13
|
||||
#define XGI330_CRT2Data_1_2 0
|
||||
#define XGI330_CRT2Data_4_D 0
|
||||
#define XGI330_CRT2Data_4_E 0
|
||||
#define XGI330_CRT2Data_4_10 0x80
|
||||
#define XGI330_SR07 0x18
|
||||
#define XGI330_SR1F 0
|
||||
#define XGI330_SR23 0xf6
|
||||
#define XGI330_SR24 0x0d
|
||||
#define XGI330_SR31 0xc0
|
||||
#define XGI330_SR32 0x11
|
||||
#define XGI330_SR33 0
|
||||
|
||||
extern const struct XGI_ExtStruct XGI330_EModeIDTable[];
|
||||
extern const struct XGI_Ext2Struct XGI330_RefIndex[];
|
||||
extern const struct XGI_CRT1TableStruct XGI_CRT1Table[];
|
||||
extern const struct XGI_ECLKDataStruct XGI340_ECLKData[];
|
||||
extern const struct SiS_VCLKData XGI_VCLKData[];
|
||||
extern const unsigned char XGI340_CR6B[][4];
|
||||
extern const unsigned char XGI340_AGPReg[];
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,6 +0,0 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
#ifndef _VBINIT_
|
||||
#define _VBINIT_
|
||||
unsigned char XGIInitNew(struct pci_dev *pdev);
|
||||
void XGIRegInit(struct vb_device_info *XGI_Pr, unsigned long BaseAddr);
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,24 +0,0 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
#ifndef _VBSETMODE_
|
||||
#define _VBSETMODE_
|
||||
|
||||
void InitTo330Pointer(unsigned char ChipType, struct vb_device_info *pVBInfo);
|
||||
void XGI_UnLockCRT2(struct vb_device_info *pVBInfo);
|
||||
void XGI_LockCRT2(struct vb_device_info *pVBInfo);
|
||||
void XGI_DisplayOff(struct xgifb_video_info *xgifb_info,
|
||||
struct xgi_hw_device_info *pXGIHWDE,
|
||||
struct vb_device_info *pVBInfo);
|
||||
void XGI_GetVBType(struct vb_device_info *pVBInfo);
|
||||
void XGI_SenseCRT1(struct vb_device_info *pVBInfo);
|
||||
unsigned char XGISetModeNew(struct xgifb_video_info *xgifb_info,
|
||||
struct xgi_hw_device_info *HwDeviceExtension,
|
||||
unsigned short ModeNo);
|
||||
|
||||
unsigned char XGI_SearchModeID(unsigned short ModeNo,
|
||||
unsigned short *ModeIdIndex);
|
||||
unsigned short XGI_GetRatePtrCRT2(struct xgi_hw_device_info *pXGIHWDE,
|
||||
unsigned short ModeNo,
|
||||
unsigned short ModeIdIndex,
|
||||
struct vb_device_info *pVBInfo);
|
||||
|
||||
#endif
|
||||
@ -1,165 +0,0 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
#ifndef _VB_STRUCT_
|
||||
#define _VB_STRUCT_
|
||||
#include "../../video/fbdev/sis/vstruct.h"
|
||||
|
||||
struct XGI_LVDSCRT1HDataStruct {
|
||||
unsigned char Reg[8];
|
||||
};
|
||||
|
||||
struct XGI_LVDSCRT1VDataStruct {
|
||||
unsigned char Reg[7];
|
||||
};
|
||||
|
||||
struct XGI_ExtStruct {
|
||||
unsigned char Ext_ModeID;
|
||||
unsigned short Ext_ModeFlag;
|
||||
unsigned short Ext_ModeInfo;
|
||||
unsigned char Ext_RESINFO;
|
||||
unsigned char VB_ExtTVYFilterIndex;
|
||||
unsigned char REFindex;
|
||||
};
|
||||
|
||||
struct XGI_Ext2Struct {
|
||||
unsigned short Ext_InfoFlag;
|
||||
unsigned char Ext_CRT1CRTC;
|
||||
unsigned char Ext_CRTVCLK;
|
||||
unsigned char Ext_CRT2CRTC;
|
||||
unsigned char Ext_CRT2CRTC2;
|
||||
unsigned char ModeID;
|
||||
unsigned short XRes;
|
||||
unsigned short YRes;
|
||||
};
|
||||
|
||||
struct XGI_ECLKDataStruct {
|
||||
unsigned char SR2E, SR2F, SR30;
|
||||
unsigned short CLOCK;
|
||||
};
|
||||
|
||||
/*add for new UNIVGABIOS*/
|
||||
struct XGI_LCDDesStruct {
|
||||
unsigned short LCDHDES;
|
||||
unsigned short LCDHRS;
|
||||
unsigned short LCDVDES;
|
||||
unsigned short LCDVRS;
|
||||
};
|
||||
|
||||
struct XGI330_LCDDataDesStruct2 {
|
||||
unsigned short LCDHDES;
|
||||
unsigned short LCDHRS;
|
||||
unsigned short LCDVDES;
|
||||
unsigned short LCDVRS;
|
||||
unsigned short LCDHSync;
|
||||
unsigned short LCDVSync;
|
||||
};
|
||||
|
||||
struct XGI330_LCDDataTablStruct {
|
||||
unsigned char PANELID;
|
||||
unsigned short MASK;
|
||||
unsigned short CAP;
|
||||
void const *DATAPTR;
|
||||
};
|
||||
|
||||
struct XGI330_TVDataTablStruct {
|
||||
unsigned short MASK;
|
||||
unsigned short CAP;
|
||||
struct SiS_TVData const *DATAPTR;
|
||||
};
|
||||
|
||||
struct XGI_TimingHStruct {
|
||||
unsigned char data[8];
|
||||
};
|
||||
|
||||
struct XGI_TimingVStruct {
|
||||
unsigned char data[7];
|
||||
};
|
||||
|
||||
struct XGI_XG21CRT1Struct {
|
||||
unsigned char ModeID, CR02, CR03, CR15, CR16;
|
||||
};
|
||||
|
||||
struct XGI330_LCDCapStruct {
|
||||
unsigned char LCD_ID;
|
||||
unsigned short LCD_Capability;
|
||||
unsigned char LCD_HSyncWidth;
|
||||
unsigned char LCD_VSyncWidth;
|
||||
unsigned char LCD_VCLK;
|
||||
unsigned char LCDA_VCLKData1;
|
||||
unsigned char LCDA_VCLKData2;
|
||||
unsigned char LCUCHAR_VCLKData1;
|
||||
unsigned char LCUCHAR_VCLKData2;
|
||||
unsigned char Spectrum_31;
|
||||
unsigned char Spectrum_32;
|
||||
unsigned char Spectrum_33;
|
||||
unsigned char Spectrum_34;
|
||||
};
|
||||
|
||||
struct XGI21_LVDSCapStruct {
|
||||
unsigned short LVDS_Capability;
|
||||
unsigned short LVDSHT;
|
||||
unsigned short LVDSVT;
|
||||
unsigned short LVDSHDE;
|
||||
unsigned short LVDSVDE;
|
||||
unsigned short LVDSHFP;
|
||||
unsigned short LVDSVFP;
|
||||
unsigned short LVDSHSYNC;
|
||||
unsigned short LVDSVSYNC;
|
||||
unsigned char VCLKData1;
|
||||
unsigned char VCLKData2;
|
||||
unsigned char PSC_S1; /* Duration between CPL on and signal on */
|
||||
unsigned char PSC_S2; /* Duration signal on and Vdd on */
|
||||
unsigned char PSC_S3; /* Duration between CPL off and signal off */
|
||||
unsigned char PSC_S4; /* Duration signal off and Vdd off */
|
||||
unsigned char PSC_S5;
|
||||
};
|
||||
|
||||
struct XGI_CRT1TableStruct {
|
||||
unsigned char CR[16];
|
||||
};
|
||||
|
||||
struct XGI301C_Tap4TimingStruct {
|
||||
unsigned short DE;
|
||||
unsigned char Reg[64]; /* C0-FF */
|
||||
};
|
||||
|
||||
struct vb_device_info {
|
||||
unsigned long P3c4, P3d4, P3c0, P3ce, P3c2, P3cc;
|
||||
unsigned long P3ca, P3c6, P3c7, P3c8, P3c9, P3da;
|
||||
unsigned long Part0Port, Part1Port, Part2Port;
|
||||
unsigned long Part3Port, Part4Port, Part5Port;
|
||||
unsigned short RVBHCFACT, RVBHCMAX, RVBHRS;
|
||||
unsigned short VGAVT, VGAHT, VGAVDE, VGAHDE;
|
||||
unsigned short VT, HT, VDE, HDE;
|
||||
unsigned short LCDHRS, LCDVRS, LCDHDES, LCDVDES;
|
||||
|
||||
unsigned short ModeType;
|
||||
unsigned short IF_DEF_LVDS;
|
||||
unsigned short IF_DEF_CRT2Monitor;
|
||||
unsigned short IF_DEF_YPbPr;
|
||||
unsigned short IF_DEF_HiVision;
|
||||
unsigned short LCDResInfo, LCDTypeInfo, VBType;/*301b*/
|
||||
unsigned short VBInfo, TVInfo, LCDInfo;
|
||||
unsigned short SetFlag;
|
||||
unsigned short NewFlickerMode;
|
||||
unsigned short SelectCRT2Rate;
|
||||
|
||||
void __iomem *FBAddr;
|
||||
|
||||
unsigned char const *SR18;
|
||||
unsigned char const (*CR40)[3];
|
||||
|
||||
struct SiS_MCLKData const *MCLKData;
|
||||
|
||||
unsigned char XGINew_CR97;
|
||||
|
||||
struct XGI330_LCDCapStruct const *LCDCapList;
|
||||
|
||||
struct XGI_TimingHStruct TimingH;
|
||||
struct XGI_TimingVStruct TimingV;
|
||||
|
||||
int ram_type;
|
||||
int ram_channel;
|
||||
int ram_bus;
|
||||
}; /* _struct vb_device_info */
|
||||
|
||||
#endif /* _VB_STRUCT_ */
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,46 +0,0 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
#ifndef _VBUTIL_
|
||||
#define _VBUTIL_
|
||||
static inline void xgifb_reg_set(unsigned long port, u8 index, u8 data)
|
||||
{
|
||||
outb(index, port);
|
||||
outb(data, port + 1);
|
||||
}
|
||||
|
||||
static inline u8 xgifb_reg_get(unsigned long port, u8 index)
|
||||
{
|
||||
outb(index, port);
|
||||
return inb(port + 1);
|
||||
}
|
||||
|
||||
static inline void xgifb_reg_and_or(unsigned long port, u8 index,
|
||||
unsigned int data_and, unsigned int data_or)
|
||||
{
|
||||
u8 temp;
|
||||
|
||||
temp = xgifb_reg_get(port, index);
|
||||
temp = (u8)((temp & data_and) | data_or);
|
||||
xgifb_reg_set(port, index, temp);
|
||||
}
|
||||
|
||||
static inline void xgifb_reg_and(unsigned long port, u8 index,
|
||||
unsigned int data_and)
|
||||
{
|
||||
u8 temp;
|
||||
|
||||
temp = xgifb_reg_get(port, index);
|
||||
temp = (u8)(temp & data_and);
|
||||
xgifb_reg_set(port, index, temp);
|
||||
}
|
||||
|
||||
static inline void xgifb_reg_or(unsigned long port, u8 index,
|
||||
unsigned int data_or)
|
||||
{
|
||||
u8 temp;
|
||||
|
||||
temp = xgifb_reg_get(port, index);
|
||||
temp |= data_or;
|
||||
xgifb_reg_set(port, index, temp);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -1,51 +0,0 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
#ifndef _VGATYPES_
|
||||
#define _VGATYPES_
|
||||
|
||||
#include <linux/fb.h> /* for struct fb_var_screeninfo for sis.h */
|
||||
#include "../../video/fbdev/sis/vgatypes.h"
|
||||
#include "../../video/fbdev/sis/sis.h" /* for LCD_TYPE */
|
||||
|
||||
enum XGI_VB_CHIP_TYPE {
|
||||
VB_CHIP_Legacy = 0,
|
||||
VB_CHIP_301,
|
||||
VB_CHIP_301B,
|
||||
VB_CHIP_301LV,
|
||||
VB_CHIP_302,
|
||||
VB_CHIP_302B,
|
||||
VB_CHIP_302LV,
|
||||
VB_CHIP_301C,
|
||||
VB_CHIP_302ELV,
|
||||
VB_CHIP_UNKNOWN, /* other video bridge or no video bridge */
|
||||
MAX_VB_CHIP
|
||||
};
|
||||
|
||||
struct xgi_hw_device_info {
|
||||
unsigned long ulExternalChip; /* NO VB or other video bridge*/
|
||||
/* if ujVBChipID = VB_CHIP_UNKNOWN, */
|
||||
|
||||
void __iomem *pjVideoMemoryAddress;/* base virtual memory address */
|
||||
/* of Linear VGA memory */
|
||||
|
||||
unsigned long ulVideoMemorySize; /* size, in bytes, of the
|
||||
* memory on the board
|
||||
*/
|
||||
|
||||
unsigned char jChipType; /* Used to Identify Graphics Chip */
|
||||
/* defined in the data structure type */
|
||||
/* "XGI_CHIP_TYPE" */
|
||||
|
||||
unsigned char jChipRevision; /* Used to Identify Graphics
|
||||
* Chip Revision
|
||||
*/
|
||||
|
||||
unsigned char ujVBChipID; /* the ID of video bridge */
|
||||
/* defined in the data structure type */
|
||||
/* "XGI_VB_CHIP_TYPE" */
|
||||
|
||||
unsigned long ulCRT2LCDType; /* defined in the data structure type */
|
||||
};
|
||||
|
||||
/* Additional IOCTL for communication xgifb <> X driver */
|
||||
/* If changing this, xgifb.h must also be changed (for xgifb) */
|
||||
#endif
|
||||
Loading…
Reference in New Issue
Block a user