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drm/edid: Extend range-based mode addition for EDID 1.4
1.4 adds better pixel clock precision, explicit reduced blanking awareness, and extended sync ranges. It's almost like a real spec. Signed-off-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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@ -1066,36 +1066,89 @@ static int add_standard_modes(struct drm_connector *connector, struct edid *edid
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return modes;
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}
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static bool
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mode_is_rb(struct drm_display_mode *mode)
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{
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return (mode->htotal - mode->hdisplay == 160) &&
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(mode->hsync_end - mode->hdisplay == 80) &&
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(mode->hsync_end - mode->hsync_start == 32) &&
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(mode->vsync_start - mode->vdisplay == 3);
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}
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static bool
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mode_in_hsync_range(struct drm_display_mode *mode, struct edid *edid, u8 *t)
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{
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int hsync, hmin, hmax;
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hmin = t[7];
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if (edid->revision >= 4)
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hmin += ((t[4] & 0x04) ? 255 : 0);
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hmax = t[8];
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if (edid->revision >= 4)
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hmax += ((t[4] & 0x08) ? 255 : 0);
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hsync = drm_mode_hsync(mode);
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return (hsync <= hmax && hsync >= hmin);
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}
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static bool
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mode_in_vsync_range(struct drm_display_mode *mode, struct edid *edid, u8 *t)
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{
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int vsync, vmin, vmax;
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vmin = t[5];
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if (edid->revision >= 4)
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vmin += ((t[4] & 0x01) ? 255 : 0);
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vmax = t[6];
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if (edid->revision >= 4)
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vmax += ((t[4] & 0x02) ? 255 : 0);
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vsync = drm_mode_vrefresh(mode);
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return (vsync <= vmax && vsync >= vmin);
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}
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static u32
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range_pixel_clock(struct edid *edid, u8 *t)
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{
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/* unspecified */
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if (t[9] == 0 || t[9] == 255)
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return 0;
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/* 1.4 with CVT support gives us real precision, yay */
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if (edid->revision >= 4 && t[10] == 0x04)
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return (t[9] * 10000) - ((t[12] >> 2) * 250);
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/* 1.3 is pathetic, so fuzz up a bit */
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return t[9] * 10000 + 5001;
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}
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/*
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* XXX fix this for:
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* - GTF secondary curve formula
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* - EDID 1.4 range offsets
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* - CVT extended bits
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* XXX fix this for GTF secondary curve formula
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*/
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static bool
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mode_in_range(struct drm_display_mode *mode, struct detailed_timing *timing)
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mode_in_range(struct drm_display_mode *mode, struct edid *edid,
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struct detailed_timing *timing)
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{
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struct detailed_data_monitor_range *range;
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int hsync, vrefresh;
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u32 max_clock;
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u8 *t = (u8 *)timing;
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range = &timing->data.other_data.data.range;
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hsync = drm_mode_hsync(mode);
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vrefresh = drm_mode_vrefresh(mode);
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if (hsync < range->min_hfreq_khz || hsync > range->max_hfreq_khz)
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if (!mode_in_hsync_range(mode, edid, t))
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return false;
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if (vrefresh < range->min_vfreq || vrefresh > range->max_vfreq)
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if (!mode_in_vsync_range(mode, edid, t))
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return false;
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if (range->pixel_clock_mhz && range->pixel_clock_mhz != 0xff) {
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/* be forgiving since it's in units of 10MHz */
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int max_clock = range->pixel_clock_mhz * 10 + 9;
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max_clock *= 1000;
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if ((max_clock = range_pixel_clock(edid, t)))
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if (mode->clock > max_clock)
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return false;
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}
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/* 1.4 max horizontal check */
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if (edid->revision >= 4 && t[10] == 0x04)
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if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
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return false;
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if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
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return false;
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return true;
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}
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@ -1104,15 +1157,16 @@ mode_in_range(struct drm_display_mode *mode, struct detailed_timing *timing)
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* XXX If drm_dmt_modes ever regrows the CVT-R modes (and it will) this will
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* need to account for them.
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*/
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static int drm_gtf_modes_for_range(struct drm_connector *connector,
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struct detailed_timing *timing)
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static int
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drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
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struct detailed_timing *timing)
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{
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int i, modes = 0;
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struct drm_display_mode *newmode;
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struct drm_device *dev = connector->dev;
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for (i = 0; i < drm_num_dmt_modes; i++) {
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if (mode_in_range(drm_dmt_modes + i, timing)) {
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if (mode_in_range(drm_dmt_modes + i, edid, timing)) {
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newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
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if (newmode) {
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drm_mode_probed_add(connector, newmode);
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@ -1288,7 +1342,8 @@ static int add_detailed_modes(struct drm_connector *connector,
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switch (data->type) {
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case EDID_DETAIL_MONITOR_RANGE:
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if (gtf)
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modes += drm_gtf_modes_for_range(connector, timing);
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modes += drm_gtf_modes_for_range(connector, edid,
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timing);
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break;
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case EDID_DETAIL_STD_MODES:
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/* Six modes per detailed section */
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