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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-17 23:36:49 +07:00
IB/mlx5: Add PCI write end padding support
Add the PCI write end padding flag to device_cap_flags enum and set it during mlx5_ib_query_device so it will be reported to user-space. During WQ/QP creation, set that capability for WQ/QP if user requested it and HW supports it. PCI write end padding modification is not supported for now. There's no such flag for a QP but for a WQ, create and modify use the same flag. Return an error if PCI write end padding flag is set during modify_wq. Signed-off-by: Noa Osherovich <noaos@mellanox.com> Reviewed-by: Majd Dibbiny <majd@mellanox.com> Signed-off-by: Leon Romanovsky <leon@kernel.org> Signed-off-by: Doug Ledford <dledford@redhat.com>
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@ -715,6 +715,9 @@ static int mlx5_ib_query_device(struct ib_device *ibdev,
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if (mlx5_get_flow_namespace(dev->mdev, MLX5_FLOW_NAMESPACE_BYPASS))
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props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING;
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if (MLX5_CAP_GEN(mdev, end_pad))
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props->device_cap_flags |= IB_DEVICE_PCI_WRITE_END_PADDING;
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props->vendor_part_id = mdev->pdev->device;
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props->hw_ver = mdev->pdev->revision;
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@ -228,6 +228,7 @@ struct wr_list {
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enum mlx5_ib_rq_flags {
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MLX5_IB_RQ_CVLAN_STRIPPING = 1 << 0,
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MLX5_IB_RQ_PCI_WRITE_END_PADDING = 1 << 1,
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};
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struct mlx5_ib_wq {
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@ -421,7 +422,7 @@ enum mlx5_ib_qp_flags {
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MLX5_IB_QP_RSS = 1 << 8,
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MLX5_IB_QP_CVLAN_STRIPPING = 1 << 9,
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MLX5_IB_QP_UNDERLAY = 1 << 10,
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/* Reserved for PCI_WRITE_PAD = 1 << 11, */
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MLX5_IB_QP_PCI_WRITE_END_PADDING = 1 << 11,
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MLX5_IB_QP_TUNNEL_OFFLOAD = 1 << 12,
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};
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@ -1178,8 +1178,8 @@ static int create_raw_packet_qp_rq(struct mlx5_ib_dev *dev,
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wq = MLX5_ADDR_OF(rqc, rqc, wq);
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MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC);
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MLX5_SET(wq, wq, end_padding_mode,
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MLX5_GET(qpc, qpc, end_padding_mode));
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if (rq->flags & MLX5_IB_RQ_PCI_WRITE_END_PADDING)
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MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN);
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MLX5_SET(wq, wq, page_offset, MLX5_GET(qpc, qpc, page_offset));
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MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd));
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MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr));
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@ -1276,6 +1276,8 @@ static int create_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp,
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if (qp->flags & MLX5_IB_QP_CVLAN_STRIPPING)
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rq->flags |= MLX5_IB_RQ_CVLAN_STRIPPING;
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if (qp->flags & MLX5_IB_QP_PCI_WRITE_END_PADDING)
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rq->flags |= MLX5_IB_RQ_PCI_WRITE_END_PADDING;
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err = create_raw_packet_qp_rq(dev, rq, in);
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if (err)
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goto err_destroy_sq;
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@ -1821,6 +1823,19 @@ static int create_qp_common(struct mlx5_ib_dev *dev, struct ib_pd *pd,
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qp->flags |= MLX5_IB_QP_LSO;
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}
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if (init_attr->create_flags & IB_QP_CREATE_PCI_WRITE_END_PADDING) {
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if (!MLX5_CAP_GEN(dev->mdev, end_pad)) {
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mlx5_ib_dbg(dev, "scatter end padding is not supported\n");
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err = -EOPNOTSUPP;
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goto err;
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} else if (init_attr->qp_type != IB_QPT_RAW_PACKET) {
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MLX5_SET(qpc, qpc, end_padding_mode,
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MLX5_WQ_END_PAD_MODE_ALIGN);
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} else {
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qp->flags |= MLX5_IB_QP_PCI_WRITE_END_PADDING;
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}
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}
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if (init_attr->qp_type == IB_QPT_RAW_PACKET ||
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qp->flags & MLX5_IB_QP_UNDERLAY) {
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qp->raw_packet_qp.sq.ubuffer.buf_addr = ucmd.sq_buf_addr;
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@ -1865,6 +1880,7 @@ static int create_qp_common(struct mlx5_ib_dev *dev, struct ib_pd *pd,
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else if (qp->create_type == MLX5_QP_KERNEL)
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destroy_qp_kernel(dev, qp);
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err:
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kvfree(in);
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return err;
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}
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@ -4749,7 +4765,15 @@ static int create_rq(struct mlx5_ib_rwq *rwq, struct ib_pd *pd,
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MLX5_SET(wq, wq, wq_type,
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rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ ?
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MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ : MLX5_WQ_TYPE_CYCLIC);
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MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN);
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if (init_attr->create_flags & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) {
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if (!MLX5_CAP_GEN(dev->mdev, end_pad)) {
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mlx5_ib_dbg(dev, "Scatter end padding is not supported\n");
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err = -EOPNOTSUPP;
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goto out;
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} else {
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MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN);
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}
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}
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MLX5_SET(wq, wq, log_wq_stride, rwq->log_rq_stride);
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if (rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ) {
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MLX5_SET(wq, wq, two_byte_shift_en, rwq->two_byte_shift_en);
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@ -5129,6 +5153,12 @@ int mlx5_ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *wq_attr,
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MLX5_SET(rqc, rqc, vsd,
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(wq_attr->flags & IB_WQ_FLAGS_CVLAN_STRIPPING) ? 0 : 1);
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}
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if (wq_attr->flags_mask & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) {
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mlx5_ib_dbg(dev, "Modifying scatter end padding is not supported\n");
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err = -EOPNOTSUPP;
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goto out;
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}
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}
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if (curr_wq_state == IB_WQS_RESET && wq_state == IB_WQS_RDY) {
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