arm64: dts: Amlogic updates for v4.21, round2

Highlights: - fix IRQ trigger type - AXG: enable GPIO IRQs, PHY IRQ, watchdog -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAlwRndwACgkQWTcYmtP7 xmW4Yg/+PfUUjs99MtbY2MBZ6mVABpKhlGVUr2cHA9+B3EojSWGCNLtBaL34tGWO Q5GjG75WFSBFNiteT5eAZKGQBe4hVE067BmxHtkpzEHAfXgTnCchQjevIDXVfDgt uHoZ9djbzhe7PVQFuEdma/sqNI7YepzomCLkgSO3jcumjaAdRfJH1iAaGS35b7/W DFSYNEz6l1Bz4I78A9VwRvrNm25ttwyJwLXLDp4d/yUw7bamgkZ01hmOtLdsCr8I yIiOs3CzIsAYerUbbDFRBJVtX2atKXTftOwzlxeaXzYz3pjwC0+iUFswpWmcFQ1u KiVoYX3nD0NlpyC5kok/0XWHYmSEfqxOX3vDyGfbqFfgF/Ax28fvyjyKYXoKgP1b NEM+oKPgfzNlMj74UNWrIMCE96XPvtc4I5O0uZi4GFGD4grgPKkyoRvm4dqRny6o K3AZGDjnwdmBGvEtGVabj46vHSFWJHP44JFLWY85kJ/blBWO1U2Ugmva7e3lKkuP VDsfAEnIDv/Wo2jFErk4+vb6Ea8MfflmnjMmVX4m04l5Bi+h/llIELLDHhoXHSoi KQRMM6X5dTjGbSxQqtHelTcqs2q2Giv6d1TYkaKnN9+JUbTjcpWAU72wh4GaE8fo Jub1MNpMMFZg4HMUrR2ERzu83+O53sSaWQnK1RkudBDRtUUxgoA= =J/po -----END PGP SIGNATURE----- Merge tag 'amlogic-dt64-2-redo' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt arm64: dts: Amlogic updates for v4.21, round2 Highlights: - fix IRQ trigger type - AXG: enable GPIO IRQs, PHY IRQ, watchdog * tag 'amlogic-dt64-2-redo' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: arm64: dts: meson: Fix IRQ trigger type for macirq arm64: dts: meson-axg: Enable GPIO interrupt controller arm64: dts: meson-axg: s400: Enable PHY interrupt arm64: dts: meson: add clock controller clock inputs dt-bindings: clk: meson: add main controller clock input dt-bindings: clk: meson: add ao controller clock inputs arm64: dts: meson-axg: remove alternate xtal arm64: dts: meson-axg: Enable watchdog on Meson AXG SoCs Signed-off-by: Olof Johansson <olof@lixom.net>
2024-11-24 13:31:02 +07:00 · 2018-12-12 17:50:39 -08:00 · 2018-12-12 17:50:39 -08:00 · b125eb0bf4
commit b125eb0bf4
parent a323a513c7 8b3e6f8999
9 changed files with 38 additions and 14 deletions
--- a/Documentation/devicetree/bindings/clock/amlogic,gxbb-aoclkc.txt
+++ b/Documentation/devicetree/bindings/clock/amlogic,gxbb-aoclkc.txt
@ -11,6 +11,13 @@ Required Properties:
 	- GXM (S912) : "amlogic,meson-gxm-aoclkc"
 	- AXG (A113D, A113X) : "amlogic,meson-axg-aoclkc"
 	followed by the common "amlogic,meson-gx-aoclkc"
+- clocks: list of clock phandle, one for each entry clock-names.
+- clock-names: should contain the following:
+  * "xtal"     : the platform xtal
+  * "mpeg-clk" : the main clock controller mother clock (aka clk81)
+  * "ext-32k-0"  : external 32kHz reference #0 if any (optional)
+  * "ext-32k-1"  : external 32kHz reference #1 if any (optional - gx only)
+  * "ext-32k-2"  : external 32kHz reference #2 if any (optional - gx only)

 - #clock-cells: should be 1.

@ -40,8 +47,9 @@ ao_sysctrl: sys-ctrl@0 {
 		compatible = "amlogic,meson-gxbb-aoclkc", "amlogic,meson-gx-aoclkc";
 		#clock-cells = <1>;
 		#reset-cells = <1>;
+		clocks = <&xtal>, <&clkc CLKID_CLK81>;
+		clock-names = "xtal", "mpeg-clk";
 	};
-};

 Example: UART controller node that consumes the clock and reset generated
  by the clock controller:
--- a/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt
+++ b/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt
@ -9,6 +9,9 @@ Required Properties:
 		"amlogic,gxbb-clkc" for GXBB SoC,
 		"amlogic,gxl-clkc" for GXL and GXM SoC,
 		"amlogic,axg-clkc" for AXG SoC.
+- clocks : list of clock phandle, one for each entry clock-names.
+- clock-names : should contain the following:
+  * "xtal": the platform xtal

 - #clock-cells: should be 1.

@ -31,6 +34,8 @@ sysctrl: system-controller@0 {
 	clkc: clock-controller {
 		#clock-cells = <1>;
 		compatible = "amlogic,gxbb-clkc";
+		clocks = <&xtal>;
+		clock-names = "xtal";
 	};
 };

--- a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
@ -357,6 +357,8 @@ mdio {
 		eth_phy0: ethernet-phy@0 {
 			/* Realtek RTL8211F (0x001cc916) */
 			reg = <0>;
+			interrupt-parent = <&gpio_intc>;
+			interrupts = <98 IRQ_TYPE_LEVEL_LOW>;
 			eee-broken-1000t;
 		};
 	};
--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
@ -53,13 +53,6 @@ tdmif_c: audio-controller-2 {
 		status = "disabled";
 	};

-	ao_alt_xtal: ao_alt_xtal-clk {
-		compatible = "fixed-clock";
-		clock-frequency = <32000000>;
-		clock-output-names = "ao_alt_xtal";
-		#clock-cells = <0>;
-	};
-
 	arm-pmu {
 		compatible = "arm,cortex-a53-pmu";
 		interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
@ -173,7 +166,7 @@ ethmac: ethernet@ff3f0000 {
 			compatible = "amlogic,meson-axg-dwmac", "snps,dwmac";
 			reg = <0x0 0xff3f0000 0x0 0x10000
 			       0x0 0xff634540 0x0 0x8>;
-			interrupts = <GIC_SPI 8 IRQ_TYPE_EDGE_RISING>;
+			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "macirq";
 			clocks = <&clkc CLKID_ETH>,
 				 <&clkc CLKID_FCLK_DIV2>,
@ -1089,6 +1082,8 @@ sysctrl: system-controller@0 {
 				clkc: clock-controller {
 					compatible = "amlogic,axg-clkc";
 					#clock-cells = <1>;
+					clocks = <&xtal>;
+					clock-names = "xtal";
 				};
 			};
 		};
@ -1334,6 +1329,8 @@ clkc_AO: clock-controller {
 					compatible = "amlogic,meson-axg-aoclkc";
 					#clock-cells = <1>;
 					#reset-cells = <1>;
+					clocks = <&xtal>, <&clkc CLKID_CLK81>;
+					clock-names = "xtal", "mpeg-clk";
 				};
 			};

@ -1543,12 +1540,18 @@ reset: reset-controller@1004 {
 			};

 			gpio_intc: interrupt-controller@f080 {
-				compatible = "amlogic,meson-gpio-intc";
+				compatible = "amlogic,meson-axg-gpio-intc",
+					     "amlogic,meson-gpio-intc";
 				reg = <0x0 0xf080 0x0 0x10>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
-				status = "disabled";
+			};
+
+			watchdog@f0d0 {
+				compatible = "amlogic,meson-gxbb-wdt";
+				reg = <0x0 0xf0d0 0x0 0x10>;
+				clocks = <&xtal>;
 			};

 			pwm_ab: pwm@1b000 {
--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
@ -467,7 +467,7 @@ ethmac: ethernet@c9410000 {
 			compatible = "amlogic,meson-gx-dwmac", "amlogic,meson-gxbb-dwmac", "snps,dwmac";
 			reg = <0x0 0xc9410000 0x0 0x10000
 			       0x0 0xc8834540 0x0 0x4>;
-			interrupts = <GIC_SPI 8 IRQ_TYPE_EDGE_RISING>;
+			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "macirq";
 			status = "disabled";
 		};
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
@ -143,7 +143,6 @@ eth_phy0: ethernet-phy@0 {
 			interrupt-parent = <&gpio_intc>;
 			/* MAC_INTR on GPIOZ_15 */
 			interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
-			eee-broken-1000t;
 		};
 	};
 };
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi
@ -142,7 +142,6 @@ mdio {
 		eth_phy0: ethernet-phy@0 {
 			/* Realtek RTL8211F (0x001cc916) */
 			reg = <0>;
-			eee-broken-1000t;
 		};
 	};
 };
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
@ -299,6 +299,8 @@ &cec_AO {

 &clkc_AO {
 	compatible = "amlogic,meson-gxbb-aoclkc", "amlogic,meson-gx-aoclkc";
+	clocks = <&xtal>, <&clkc CLKID_CLK81>;
+	clock-names = "xtal", "mpeg-clk";
 };

 &efuse {
@ -334,6 +336,8 @@ &sysctrl {
 	clkc: clock-controller {
 		compatible = "amlogic,gxbb-clkc";
 		#clock-cells = <1>;
+		clocks = <&xtal>;
+		clock-names = "xtal";
 	};
 };

--- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
@ -260,6 +260,8 @@ &cec_AO {

 &clkc_AO {
 	compatible = "amlogic,meson-gxl-aoclkc", "amlogic,meson-gx-aoclkc";
+	clocks = <&xtal>, <&clkc CLKID_CLK81>;
+	clock-names = "xtal", "mpeg-clk";
 };

 &gpio_intc {
@ -284,6 +286,8 @@ &sysctrl {
 	clkc: clock-controller {
 		compatible = "amlogic,gxl-clkc";
 		#clock-cells = <1>;
+		clocks = <&xtal>;
+		clock-names = "xtal";
 	};
 };