AuxXxilium/linux_dsm_epyc7002
1
0
Fork 0
mirror of https://github.com/AuxXxilium/linux_dsm_epyc7002.git synced 2025-02-12 06:36:23 +07:00
Code Issues Actions Packages Projects Releases Wiki Activity

amdgpu/dc: remove pointless returns in the i2caux constructor paths. (v2)

Browse Source 
There was lots of return true, and error checking that was never used
in these paths.

Just remove it all.

v2: I missed one return true.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Dave Airlie 2017-09-29 15:44:54 +10:00 committed by Alex Deucher
parent 4179cd8137
commit b08c3ca4e9
28 changed files with 100 additions and 246 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/gpu/drm/amd/display/dc/i2caux/aux_engine.c
View File

@ -555,15 +555,13 @@ bool dal_aux_engine_submit_request(
return result;
}
bool dal_aux_engine_construct(
void dal_aux_engine_construct(
struct aux_engine *engine,
struct dc_context *ctx)
{
if (!dal_i2caux_construct_engine(&engine->base, ctx))
return false;
dal_i2caux_construct_engine(&engine->base, ctx);
engine->delay = 0;
engine->max_defer_write_retry = 0;
return true;
}
void dal_aux_engine_destruct(

2
drivers/gpu/drm/amd/display/dc/i2caux/aux_engine.h
View File

@ -100,7 +100,7 @@ struct aux_engine {
bool acquire_reset;
};
bool dal_aux_engine_construct(
void dal_aux_engine_construct(
struct aux_engine *engine,
struct dc_context *ctx);

21
drivers/gpu/drm/amd/display/dc/i2caux/dce100/i2caux_dce100.c
View File

@ -95,18 +95,11 @@ struct i2caux *dal_i2caux_dce100_create(
return NULL;
}
if (dal_i2caux_dce110_construct(
i2caux_dce110,
ctx,
dce100_aux_regs,
dce100_hw_engine_regs,
&i2c_shift,
&i2c_mask))
return &i2caux_dce110->base;
ASSERT_CRITICAL(false);
kfree(i2caux_dce110);
return NULL;
dal_i2caux_dce110_construct(i2caux_dce110,
ctx,
dce100_aux_regs,
dce100_hw_engine_regs,
&i2c_shift,
&i2c_mask);
return &i2caux_dce110->base;
}

20
drivers/gpu/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c
View File

@ -426,22 +426,16 @@ static const struct engine_funcs engine_funcs = {
.acquire = dal_aux_engine_acquire,
};
static bool construct(
static void construct(
struct aux_engine_dce110 *engine,
const struct aux_engine_dce110_init_data *aux_init_data)
{
if (!dal_aux_engine_construct(
&engine->base, aux_init_data->ctx)) {
ASSERT_CRITICAL(false);
return false;
}
dal_aux_engine_construct(&engine->base, aux_init_data->ctx);
engine->base.base.funcs = &engine_funcs;
engine->base.funcs = &aux_engine_funcs;
engine->timeout_period = aux_init_data->timeout_period;
engine->regs = aux_init_data->regs;
return true;
}
static void destruct(
@ -471,12 +465,6 @@ struct aux_engine *dal_aux_engine_dce110_create(
return NULL;
}
if (construct(engine, aux_init_data))
return &engine->base;
ASSERT_CRITICAL(false);
kfree(engine);
return NULL;
construct(engine, aux_init_data);
return &engine->base;
}

24
drivers/gpu/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c
View File

@ -498,17 +498,13 @@ static const struct i2c_hw_engine_funcs i2c_hw_engine_funcs = {
.wait_on_operation_result = dal_i2c_hw_engine_wait_on_operation_result,
};
bool i2c_hw_engine_dce110_construct(
static void construct(
struct i2c_hw_engine_dce110 *hw_engine,
const struct i2c_hw_engine_dce110_create_arg *arg)
{
uint32_t xtal_ref_div = 0;
if (!arg->reference_frequency)
return false;
if (!dal_i2c_hw_engine_construct(&hw_engine->base, arg->ctx))
return false;
dal_i2c_hw_engine_construct(&hw_engine->base, arg->ctx);
hw_engine->base.base.base.funcs = &engine_funcs;
hw_engine->base.base.funcs = &i2c_engine_funcs;
@ -545,8 +541,6 @@ bool i2c_hw_engine_dce110_construct(
*/
hw_engine->reference_frequency =
(arg->reference_frequency * 2) / xtal_ref_div;
return true;
}
struct i2c_engine *dal_i2c_hw_engine_dce110_create(
@ -558,6 +552,10 @@ struct i2c_engine *dal_i2c_hw_engine_dce110_create(
ASSERT_CRITICAL(false);
return NULL;
}
if (!arg->reference_frequency) {
ASSERT_CRITICAL(false);
return NULL;
}
engine_dce10 = kzalloc(sizeof(struct i2c_hw_engine_dce110),
GFP_KERNEL);
@ -567,12 +565,6 @@ struct i2c_engine *dal_i2c_hw_engine_dce110_create(
return NULL;
}
if (i2c_hw_engine_dce110_construct(engine_dce10, arg))
return &engine_dce10->base.base;
ASSERT_CRITICAL(false);
kfree(engine_dce10);
return NULL;
construct(engine_dce10, arg);
return &engine_dce10->base.base;
}

4
drivers/gpu/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.h
View File

@ -207,8 +207,4 @@ struct i2c_hw_engine_dce110_create_arg {
struct i2c_engine *dal_i2c_hw_engine_dce110_create(
const struct i2c_hw_engine_dce110_create_arg *arg);
bool i2c_hw_engine_dce110_construct(
struct i2c_hw_engine_dce110 *engine_dce110,
const struct i2c_hw_engine_dce110_create_arg *arg);
#endif

20
drivers/gpu/drm/amd/display/dc/i2caux/dce110/i2c_sw_engine_dce110.c
View File

@ -118,7 +118,7 @@ static const struct engine_funcs engine_funcs = {
.submit_request = dal_i2c_sw_engine_submit_request,
};
static bool construct(
static void construct(
struct i2c_sw_engine_dce110 *engine_dce110,
const struct i2c_sw_engine_dce110_create_arg *arg_dce110)
{
@ -127,11 +127,7 @@ static bool construct(
arg_base.ctx = arg_dce110->ctx;
arg_base.default_speed = arg_dce110->default_speed;
if (!dal_i2c_sw_engine_construct(
&engine_dce110->base, &arg_base)) {
ASSERT_CRITICAL(false);
return false;
}
dal_i2c_sw_engine_construct(&engine_dce110->base, &arg_base);
/*struct engine struct engine_funcs*/
engine_dce110->base.base.base.funcs = &engine_funcs;
@ -139,8 +135,6 @@ static bool construct(
engine_dce110->base.base.funcs = &i2c_engine_funcs;
engine_dce110->base.default_speed = arg_dce110->default_speed;
engine_dce110->engine_id = arg_dce110->engine_id;
return true;
}
struct i2c_engine *dal_i2c_sw_engine_dce110_create(
@ -161,12 +155,6 @@ struct i2c_engine *dal_i2c_sw_engine_dce110_create(
return NULL;
}
if (construct(engine_dce110, arg))
return &engine_dce110->base.base;
ASSERT_CRITICAL(false);
kfree(engine_dce110);
return NULL;
construct(engine_dce110, arg);
return &engine_dce110->base.base;
}

30
drivers/gpu/drm/amd/display/dc/i2caux/dce110/i2caux_dce110.c
View File

@ -196,7 +196,7 @@ static const struct dce110_i2c_hw_engine_mask i2c_mask = {
I2C_COMMON_MASK_SH_LIST_DCE110(_MASK)
};
bool dal_i2caux_dce110_construct(
void dal_i2caux_dce110_construct(
struct i2caux_dce110 *i2caux_dce110,
struct dc_context *ctx,
const struct dce110_aux_registers aux_regs[],
@ -217,10 +217,7 @@ bool dal_i2caux_dce110_construct(
base = &i2caux_dce110->base;
if (!dal_i2caux_construct(base, ctx)) {
ASSERT_CRITICAL(false);
return false;
}
dal_i2caux_construct(base, ctx);
i2caux_dce110->base.funcs = &i2caux_funcs;
i2caux_dce110->i2c_hw_buffer_in_use = false;
@ -278,8 +275,6 @@ bool dal_i2caux_dce110_construct(
} while (i < ARRAY_SIZE(hw_aux_lines));
/*TODO Generic I2C SW and HW*/
return true;
}
/*
@ -306,18 +301,11 @@ struct i2caux *dal_i2caux_dce110_create(
return NULL;
}
if (dal_i2caux_dce110_construct(
i2caux_dce110,
ctx,
dce110_aux_regs,
i2c_hw_engine_regs,
&i2c_shift,
&i2c_mask))
return &i2caux_dce110->base;
ASSERT_CRITICAL(false);
kfree(i2caux_dce110);
return NULL;
dal_i2caux_dce110_construct(i2caux_dce110,
ctx,
dce110_aux_regs,
i2c_hw_engine_regs,
&i2c_shift,
&i2c_mask);
return &i2caux_dce110->base;
}

2
drivers/gpu/drm/amd/display/dc/i2caux/dce110/i2caux_dce110.h
View File

@ -42,7 +42,7 @@ struct dce110_i2c_hw_engine_mask;
struct i2caux *dal_i2caux_dce110_create(
struct dc_context *ctx);
bool dal_i2caux_dce110_construct(
void dal_i2caux_dce110_construct(
struct i2caux_dce110 *i2caux_dce110,
struct dc_context *ctx,
const struct dce110_aux_registers *aux_regs,

30
drivers/gpu/drm/amd/display/dc/i2caux/dce112/i2caux_dce112.c
View File

@ -87,22 +87,16 @@ static const struct dce110_i2c_hw_engine_mask i2c_mask = {
I2C_COMMON_MASK_SH_LIST_DCE110(_MASK)
};
static bool construct(
static void construct(
struct i2caux_dce110 *i2caux_dce110,
struct dc_context *ctx)
{
if (!dal_i2caux_dce110_construct(
i2caux_dce110,
ctx,
dce112_aux_regs,
dce112_hw_engine_regs,
&i2c_shift,
&i2c_mask)) {
ASSERT_CRITICAL(false);
return false;
}
return true;
dal_i2caux_dce110_construct(i2caux_dce110,
ctx,
dce112_aux_regs,
dce112_hw_engine_regs,
&i2c_shift,
&i2c_mask);
}
/*
@ -129,12 +123,6 @@ struct i2caux *dal_i2caux_dce112_create(
return NULL;
}
if (construct(i2caux_dce110, ctx))
return &i2caux_dce110->base;
ASSERT_CRITICAL(false);
kfree(i2caux_dce110);
return NULL;
construct(i2caux_dce110, ctx);
return &i2caux_dce110->base;
}

21
drivers/gpu/drm/amd/display/dc/i2caux/dce120/i2caux_dce120.c
View File

@ -108,18 +108,11 @@ struct i2caux *dal_i2caux_dce120_create(
return NULL;
}
if (dal_i2caux_dce110_construct(
i2caux_dce110,
ctx,
dce120_aux_regs,
dce120_hw_engine_regs,
&i2c_shift,
&i2c_mask))
return &i2caux_dce110->base;
ASSERT_CRITICAL(false);
kfree(i2caux_dce110);
return NULL;
dal_i2caux_dce110_construct(i2caux_dce110,
ctx,
dce120_aux_regs,
dce120_hw_engine_regs,
&i2c_shift,
&i2c_mask);
return &i2caux_dce110->base;
}

32
drivers/gpu/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c
View File

@ -824,20 +824,11 @@ static const struct i2c_hw_engine_funcs i2c_hw_engine_funcs = {
dal_i2c_hw_engine_wait_on_operation_result,
};
static bool construct(
static void construct(
struct i2c_hw_engine_dce80 *engine,
const struct i2c_hw_engine_dce80_create_arg *arg)
{
if (arg->engine_id >= sizeof(ddc_setup_offset) / sizeof(int32_t))
return false;
if (arg->engine_id >= sizeof(ddc_speed_offset) / sizeof(int32_t))
return false;
if (!arg->reference_frequency)
return false;
if (!dal_i2c_hw_engine_construct(&engine->base, arg->ctx))
return false;
dal_i2c_hw_engine_construct(&engine->base, arg->ctx);
engine->base.base.base.funcs = &engine_funcs;
engine->base.base.funcs = &i2c_engine_funcs;
@ -853,8 +844,6 @@ static bool construct(
engine->buffer_used_bytes = 0;
engine->transaction_count = 0;
engine->engine_keep_power_up_count = 1;
return true;
}
struct i2c_engine *dal_i2c_hw_engine_dce80_create(
@ -867,6 +856,13 @@ struct i2c_engine *dal_i2c_hw_engine_dce80_create(
return NULL;
}
if ((arg->engine_id >= sizeof(ddc_setup_offset) / sizeof(int32_t)) ||
(arg->engine_id >= sizeof(ddc_speed_offset) / sizeof(int32_t)) ||
!arg->reference_frequency) {
BREAK_TO_DEBUGGER();
return NULL;
}
engine = kzalloc(sizeof(struct i2c_hw_engine_dce80), GFP_KERNEL);
if (!engine) {
@ -874,12 +870,6 @@ struct i2c_engine *dal_i2c_hw_engine_dce80_create(
return NULL;
}
if (construct(engine, arg))
return &engine->base.base;
BREAK_TO_DEBUGGER();
kfree(engine);
return NULL;
construct(engine, arg);
return &engine->base.base;
}

19
drivers/gpu/drm/amd/display/dc/i2caux/dce80/i2c_sw_engine_dce80.c
View File

@ -133,7 +133,7 @@ static const struct engine_funcs engine_funcs = {
.submit_request = dal_i2c_sw_engine_submit_request,
};
static bool construct(
static void construct(
struct i2c_sw_engine_dce80 *engine,
const struct i2c_sw_engine_dce80_create_arg *arg)
{
@ -142,17 +142,12 @@ static bool construct(
arg_base.ctx = arg->ctx;
arg_base.default_speed = arg->default_speed;
if (!dal_i2c_sw_engine_construct(&engine->base, &arg_base)) {
BREAK_TO_DEBUGGER();
return false;
}
dal_i2c_sw_engine_construct(&engine->base, &arg_base);
engine->base.base.base.funcs = &engine_funcs;
engine->base.base.funcs = &i2c_engine_funcs;
engine->base.default_speed = arg->default_speed;
engine->engine_id = arg->engine_id;
return true;
}
struct i2c_engine *dal_i2c_sw_engine_dce80_create(
@ -172,13 +167,7 @@ struct i2c_engine *dal_i2c_sw_engine_dce80_create(
return NULL;
}
if (construct(engine, arg))
return &engine->base.base;
BREAK_TO_DEBUGGER();
kfree(engine);
return NULL;
construct(engine, arg);
return &engine->base.base;
}

19
drivers/gpu/drm/amd/display/dc/i2caux/dce80/i2caux_dce80.c
View File

@ -187,7 +187,7 @@ static const struct i2caux_funcs i2caux_funcs = {
.acquire_aux_engine = dal_i2caux_acquire_aux_engine,
};
static bool construct(
static void construct(
struct i2caux_dce80 *i2caux_dce80,
struct dc_context *ctx)
{
@ -207,10 +207,7 @@ static bool construct(
uint32_t i;
if (!dal_i2caux_construct(base, ctx)) {
BREAK_TO_DEBUGGER();
return false;
}
dal_i2caux_construct(base, ctx);
i2caux_dce80->base.funcs = &i2caux_funcs;
i2caux_dce80->i2c_hw_buffer_in_use = false;
@ -269,8 +266,6 @@ static bool construct(
} while (i < ARRAY_SIZE(hw_aux_lines));
/* TODO Generic I2C SW and HW */
return true;
}
struct i2caux *dal_i2caux_dce80_create(
@ -284,12 +279,6 @@ struct i2caux *dal_i2caux_dce80_create(
return NULL;
}
if (construct(i2caux_dce80, ctx))
return &i2caux_dce80->base;
BREAK_TO_DEBUGGER();
kfree(i2caux_dce80);
return NULL;
construct(i2caux_dce80, ctx);
return &i2caux_dce80->base;
}

21
drivers/gpu/drm/amd/display/dc/i2caux/dcn10/i2caux_dcn10.c
View File

@ -108,18 +108,11 @@ struct i2caux *dal_i2caux_dcn10_create(
return NULL;
}
if (dal_i2caux_dce110_construct(
i2caux_dce110,
ctx,
dcn10_aux_regs,
dcn10_hw_engine_regs,
&i2c_shift,
&i2c_mask))
return &i2caux_dce110->base;
ASSERT_CRITICAL(false);
kfree(i2caux_dce110);
return NULL;
dal_i2caux_dce110_construct(i2caux_dce110,
ctx,
dcn10_aux_regs,
dcn10_hw_engine_regs,
&i2c_shift,
&i2c_mask);
return &i2caux_dce110->base;
}

20
drivers/gpu/drm/amd/display/dc/i2caux/diagnostics/i2caux_diag.c
View File

@ -73,18 +73,12 @@ static const struct i2caux_funcs i2caux_funcs = {
.acquire_aux_engine = NULL,
};
static bool construct(
static void construct(
struct i2caux *i2caux,
struct dc_context *ctx)
{
if (!dal_i2caux_construct(i2caux, ctx)) {
ASSERT_CRITICAL(false);
return false;
}
dal_i2caux_construct(i2caux, ctx);
i2caux->funcs = &i2caux_funcs;
return true;
}
struct i2caux *dal_i2caux_diag_fpga_create(
@ -98,12 +92,6 @@ struct i2caux *dal_i2caux_diag_fpga_create(
return NULL;
}
if (construct(i2caux, ctx))
return i2caux;
ASSERT_CRITICAL(false);
kfree(i2caux);
return NULL;
construct(i2caux, ctx);
return i2caux;
}

2
drivers/gpu/drm/amd/display/dc/i2caux/engine.h
View File

@ -110,7 +110,7 @@ struct engine {
struct dc_context *ctx;
};
bool dal_i2caux_construct_engine(
void dal_i2caux_construct_engine(
struct engine *engine,
struct dc_context *ctx);

3
drivers/gpu/drm/amd/display/dc/i2caux/engine_base.c
View File

@ -36,13 +36,12 @@
#include "engine.h"
bool dal_i2caux_construct_engine(
void dal_i2caux_construct_engine(
struct engine *engine,
struct dc_context *ctx)
{
engine->ddc = NULL;
engine->ctx = ctx;
return true;
}
void dal_i2caux_destruct_engine(

7
drivers/gpu/drm/amd/display/dc/i2caux/i2c_engine.c
View File

@ -103,15 +103,12 @@ void dal_i2c_engine_process_channel_reply(
}
bool dal_i2c_engine_construct(
void dal_i2c_engine_construct(
struct i2c_engine *engine,
struct dc_context *ctx)
{
if (!dal_i2caux_construct_engine(&engine->base, ctx))
return false;
dal_i2caux_construct_engine(&engine->base, ctx);
engine->timeout_delay = 0;
return true;
}
void dal_i2c_engine_destruct(

2
drivers/gpu/drm/amd/display/dc/i2caux/i2c_engine.h
View File

@ -88,7 +88,7 @@ struct i2c_engine {
uint32_t timeout_delay;
};
bool dal_i2c_engine_construct(
void dal_i2c_engine_construct(
struct i2c_engine *engine,
struct dc_context *ctx);

6
drivers/gpu/drm/amd/display/dc/i2caux/i2c_generic_hw_engine.c
View File

@ -270,13 +270,11 @@ uint32_t dal_i2c_generic_hw_engine_get_transaction_timeout(
(1 + (length << 3) + 1);
}
bool dal_i2c_generic_hw_engine_construct(
void dal_i2c_generic_hw_engine_construct(
struct i2c_generic_hw_engine *engine,
struct dc_context *ctx)
{
if (!dal_i2c_hw_engine_construct(&engine->base, ctx))
return false;
return true;
dal_i2c_hw_engine_construct(&engine->base, ctx);
}
void dal_i2c_generic_hw_engine_destruct(

2
drivers/gpu/drm/amd/display/dc/i2caux/i2c_generic_hw_engine.h
View File

@ -59,7 +59,7 @@ struct i2c_generic_hw_engine {
const struct i2c_generic_hw_engine_funcs *funcs;
};
bool dal_i2c_generic_hw_engine_construct(
void dal_i2c_generic_hw_engine_construct(
struct i2c_generic_hw_engine *engine,
struct dc_context *ctx);

6
drivers/gpu/drm/amd/display/dc/i2caux/i2c_hw_engine.c
View File

@ -228,15 +228,13 @@ enum i2c_channel_operation_result dal_i2c_hw_engine_wait_on_operation_result(
return result;
}
bool dal_i2c_hw_engine_construct(
void dal_i2c_hw_engine_construct(
struct i2c_hw_engine *engine,
struct dc_context *ctx)
{
if (!dal_i2c_engine_construct(&engine->base, ctx))
return false;
dal_i2c_engine_construct(&engine->base, ctx);
engine->original_speed = I2CAUX_DEFAULT_I2C_HW_SPEED;
engine->default_speed = I2CAUX_DEFAULT_I2C_HW_SPEED;
return true;
}
void dal_i2c_hw_engine_destruct(

2
drivers/gpu/drm/amd/display/dc/i2caux/i2c_hw_engine.h
View File

@ -53,7 +53,7 @@ struct i2c_hw_engine {
uint32_t default_speed;
};
bool dal_i2c_hw_engine_construct(
void dal_i2c_hw_engine_construct(
struct i2c_hw_engine *engine,
struct dc_context *ctx);

17
drivers/gpu/drm/amd/display/dc/i2caux/i2c_sw_engine.c
View File

@ -569,17 +569,14 @@ static const struct engine_funcs engine_funcs = {
.submit_request = dal_i2c_sw_engine_submit_request,
};
bool dal_i2c_sw_engine_construct(
void dal_i2c_sw_engine_construct(
struct i2c_sw_engine *engine,
const struct i2c_sw_engine_create_arg *arg)
{
if (!dal_i2c_engine_construct(&engine->base, arg->ctx))
return false;
dal_i2c_engine_construct(&engine->base, arg->ctx);
dal_i2c_sw_engine_set_speed(&engine->base, arg->default_speed);
engine->base.funcs = &i2c_engine_funcs;
engine->base.base.funcs = &engine_funcs;
return true;
}
struct i2c_engine *dal_i2c_sw_engine_create(
@ -599,12 +596,6 @@ struct i2c_engine *dal_i2c_sw_engine_create(
return NULL;
}
if (dal_i2c_sw_engine_construct(engine, arg))
return &engine->base;
BREAK_TO_DEBUGGER();
kfree(engine);
return NULL;
dal_i2c_sw_engine_construct(engine, arg);
return &engine->base;
}

2
drivers/gpu/drm/amd/display/dc/i2caux/i2c_sw_engine.h
View File

@ -48,7 +48,7 @@ struct i2c_sw_engine_create_arg {
struct dc_context *ctx;
};
bool dal_i2c_sw_engine_construct(
void dal_i2c_sw_engine_construct(
struct i2c_sw_engine *engine,
const struct i2c_sw_engine_create_arg *arg);

4
drivers/gpu/drm/amd/display/dc/i2caux/i2caux.c
View File

@ -423,7 +423,7 @@ void dal_i2caux_release_engine(
engine->ddc = NULL;
}
bool dal_i2caux_construct(
void dal_i2caux_construct(
struct i2caux *i2caux,
struct dc_context *ctx)
{
@ -451,8 +451,6 @@ bool dal_i2caux_construct(
i2caux->default_i2c_hw_speed = DEFAULT_I2C_HW_SPEED;
i2caux->default_i2c_sw_speed = DEFAULT_I2C_SW_SPEED;
}
return true;
}
void dal_i2caux_destruct(

2
drivers/gpu/drm/amd/display/dc/i2caux/i2caux.h
View File

@ -97,7 +97,7 @@ struct i2caux {
uint32_t default_i2c_hw_speed;
};
bool dal_i2caux_construct(
void dal_i2caux_construct(
struct i2caux *i2caux,
struct dc_context *ctx);