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ARM: 9075/1: kernel: Fix interrupted SMC calls
[ Upstream commit 57ac51667d8cd62731223d687e5fe7b41c502f89 ]
On Qualcomm ARM32 platforms, the SMC call can return before it has
completed. If this occurs, the call can be restarted, but it requires
using the returned session ID value from the interrupted SMC call.
The ARM32 SMCC code already has the provision to add platform specific
quirks for things like this. So let's make use of it and add the
Qualcomm specific quirk (ARM_SMCCC_QUIRK_QCOM_A6) used by the QCOM_SCM
driver.
This change is similar to the below one added for ARM64 a while ago:
commit 82bcd08702
("firmware: qcom: scm: Fix interrupted SCM calls")
Without this change, the Qualcomm ARM32 platforms like SDX55 will return
-EINVAL for SMC calls used for modem firmware loading and validation.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
parent
2f06cd6d9c
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@ -24,6 +24,7 @@
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#include <asm/vdso_datapage.h>
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#include <asm/hardware/cache-l2x0.h>
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#include <linux/kbuild.h>
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#include <linux/arm-smccc.h>
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#include "signal.h"
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/*
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@ -148,6 +149,8 @@ int main(void)
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DEFINE(SLEEP_SAVE_SP_PHYS, offsetof(struct sleep_save_sp, save_ptr_stash_phys));
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DEFINE(SLEEP_SAVE_SP_VIRT, offsetof(struct sleep_save_sp, save_ptr_stash));
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#endif
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DEFINE(ARM_SMCCC_QUIRK_ID_OFFS, offsetof(struct arm_smccc_quirk, id));
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DEFINE(ARM_SMCCC_QUIRK_STATE_OFFS, offsetof(struct arm_smccc_quirk, state));
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BLANK();
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DEFINE(DMA_BIDIRECTIONAL, DMA_BIDIRECTIONAL);
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DEFINE(DMA_TO_DEVICE, DMA_TO_DEVICE);
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@ -3,7 +3,9 @@
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* Copyright (c) 2015, Linaro Limited
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*/
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#include <linux/linkage.h>
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#include <linux/arm-smccc.h>
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#include <asm/asm-offsets.h>
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#include <asm/opcodes-sec.h>
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#include <asm/opcodes-virt.h>
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#include <asm/unwind.h>
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@ -27,7 +29,14 @@ UNWIND( .fnstart)
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UNWIND( .save {r4-r7})
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ldm r12, {r4-r7}
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\instr
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pop {r4-r7}
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ldr r4, [sp, #36]
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cmp r4, #0
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beq 1f // No quirk structure
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ldr r5, [r4, #ARM_SMCCC_QUIRK_ID_OFFS]
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cmp r5, #ARM_SMCCC_QUIRK_QCOM_A6
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bne 1f // No quirk present
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str r6, [r4, #ARM_SMCCC_QUIRK_STATE_OFFS]
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1: pop {r4-r7}
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ldr r12, [sp, #(4 * 4)]
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stm r12, {r0-r3}
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bx lr
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