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drm/amdgpu: disable vm interrupts with vm_fault_stop=2
V2: disable all vm interrupts in late_init() Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -910,7 +910,10 @@ static int gmc_v7_0_late_init(void *handle)
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{
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{
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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return amdgpu_irq_get(adev, &adev->mc.vm_fault, 0);
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if (amdgpu_vm_fault_stop != AMDGPU_VM_FAULT_STOP_ALWAYS)
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return amdgpu_irq_get(adev, &adev->mc.vm_fault, 0);
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else
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return 0;
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}
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}
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static int gmc_v7_0_sw_init(void *handle)
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static int gmc_v7_0_sw_init(void *handle)
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@ -870,7 +870,10 @@ static int gmc_v8_0_late_init(void *handle)
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{
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{
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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return amdgpu_irq_get(adev, &adev->mc.vm_fault, 0);
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if (amdgpu_vm_fault_stop != AMDGPU_VM_FAULT_STOP_ALWAYS)
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return amdgpu_irq_get(adev, &adev->mc.vm_fault, 0);
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else
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return 0;
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}
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}
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#define mmMC_SEQ_MISC0_FIJI 0xA71
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#define mmMC_SEQ_MISC0_FIJI 0xA71
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