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staging: comedi: amplc_pci224: always cascade the 8254 timers
The 8254 timers are only used in this driver to generate the analog output pacer. To simplify the driver, always cascade the timers. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -841,51 +841,15 @@ pci224_ao_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
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/* Step 4: fix up any arguments. */
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if (cmd->scan_begin_src == TRIG_TIMER) {
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unsigned int div1, div2, round;
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int round_mode = cmd->flags & TRIG_ROUND_MASK;
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tmp = cmd->scan_begin_arg;
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/* Check whether to use a single timer. */
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switch (round_mode) {
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case TRIG_ROUND_NEAREST:
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default:
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round = I8254_OSC_BASE_10MHZ / 2;
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break;
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case TRIG_ROUND_DOWN:
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round = 0;
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break;
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case TRIG_ROUND_UP:
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round = I8254_OSC_BASE_10MHZ - 1;
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break;
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}
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/* Be careful to avoid overflow! */
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div2 = cmd->scan_begin_arg / I8254_OSC_BASE_10MHZ;
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div2 += (round + cmd->scan_begin_arg % I8254_OSC_BASE_10MHZ) /
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I8254_OSC_BASE_10MHZ;
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if (div2 <= 0x10000) {
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/* A single timer will suffice. */
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if (div2 < 2)
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div2 = 2;
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cmd->scan_begin_arg = div2 * I8254_OSC_BASE_10MHZ;
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if (cmd->scan_begin_arg < div2 ||
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cmd->scan_begin_arg < I8254_OSC_BASE_10MHZ) {
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/* Overflow! */
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cmd->scan_begin_arg = MAX_SCAN_PERIOD;
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}
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} else {
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/* Use two timers. */
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div1 = devpriv->cached_div1;
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div2 = devpriv->cached_div2;
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i8253_cascade_ns_to_timer(I8254_OSC_BASE_10MHZ,
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&div1, &div2,
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&cmd->scan_begin_arg,
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round_mode);
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devpriv->cached_div1 = div1;
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devpriv->cached_div2 = div2;
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}
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/* Use two timers. */
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i8253_cascade_ns_to_timer(I8254_OSC_BASE_10MHZ,
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&devpriv->cached_div1,
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&devpriv->cached_div2,
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&cmd->scan_begin_arg,
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cmd->flags);
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if (tmp != cmd->scan_begin_arg)
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err++;
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}
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if (err)
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@ -906,70 +870,33 @@ static void pci224_ao_start_pacer(struct comedi_device *dev,
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{
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struct pci224_private *devpriv = dev->private;
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struct comedi_cmd *cmd = &s->async->cmd;
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unsigned int div1, div2, round;
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unsigned int ns = cmd->scan_begin_arg;
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int round_mode = cmd->flags & TRIG_ROUND_MASK;
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/* Check whether to use a single timer. */
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switch (round_mode) {
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case TRIG_ROUND_NEAREST:
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default:
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round = I8254_OSC_BASE_10MHZ / 2;
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break;
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case TRIG_ROUND_DOWN:
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round = 0;
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break;
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case TRIG_ROUND_UP:
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round = I8254_OSC_BASE_10MHZ - 1;
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break;
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}
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/* Be careful to avoid overflow! */
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div2 = cmd->scan_begin_arg / I8254_OSC_BASE_10MHZ;
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div2 += (round + cmd->scan_begin_arg % I8254_OSC_BASE_10MHZ) /
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I8254_OSC_BASE_10MHZ;
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if (div2 <= 0x10000) {
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/* A single timer will suffice. */
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if (div2 < 2)
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div2 = 2;
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div2 &= 0xffff;
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div1 = 1; /* Flag that single timer to be used. */
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} else {
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/* Use two timers. */
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div1 = devpriv->cached_div1;
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div2 = devpriv->cached_div2;
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i8253_cascade_ns_to_timer(I8254_OSC_BASE_10MHZ,
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&div1, &div2,
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&ns, round_mode);
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}
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/* Use two timers. */
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i8253_cascade_ns_to_timer(I8254_OSC_BASE_10MHZ,
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&devpriv->cached_div1,
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&devpriv->cached_div2,
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&cmd->scan_begin_arg,
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cmd->flags);
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/*
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* The output of timer Z2-0 will be used as the scan trigger
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* source.
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*/
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/* Make sure Z2-0 is gated on. */
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outb(GAT_CONFIG(0, GAT_VCC),
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devpriv->iobase1 + PCI224_ZGAT_SCE);
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if (div1 == 1) {
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/* Not cascading. Z2-0 needs 10 MHz clock. */
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outb(CLK_CONFIG(0, CLK_10MHZ),
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devpriv->iobase1 + PCI224_ZCLK_SCE);
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} else {
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/* Cascading with Z2-2. */
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/* Make sure Z2-2 is gated on. */
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outb(GAT_CONFIG(2, GAT_VCC),
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devpriv->iobase1 + PCI224_ZGAT_SCE);
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/* Z2-2 needs 10 MHz clock. */
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outb(CLK_CONFIG(2, CLK_10MHZ),
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devpriv->iobase1 + PCI224_ZCLK_SCE);
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/* Load Z2-2 mode (2) and counter (div1). */
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i8254_load(devpriv->iobase1 + PCI224_Z2_CT0, 0,
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2, div1, 2);
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/* Z2-0 is clocked from Z2-2's output. */
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outb(CLK_CONFIG(0, CLK_OUTNM1),
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devpriv->iobase1 + PCI224_ZCLK_SCE);
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}
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outb(GAT_CONFIG(0, GAT_VCC), devpriv->iobase1 + PCI224_ZGAT_SCE);
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/* Cascading with Z2-2. */
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/* Make sure Z2-2 is gated on. */
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outb(GAT_CONFIG(2, GAT_VCC), devpriv->iobase1 + PCI224_ZGAT_SCE);
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/* Z2-2 needs 10 MHz clock. */
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outb(CLK_CONFIG(2, CLK_10MHZ), devpriv->iobase1 + PCI224_ZCLK_SCE);
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/* Load Z2-2 mode (2) and counter (div1). */
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i8254_load(devpriv->iobase1 + PCI224_Z2_CT0, 0,
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2, devpriv->cached_div1, 2);
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/* Z2-0 is clocked from Z2-2's output. */
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outb(CLK_CONFIG(0, CLK_OUTNM1), devpriv->iobase1 + PCI224_ZCLK_SCE);
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/* Load Z2-0 mode (2) and counter (div2). */
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i8254_load(devpriv->iobase1 + PCI224_Z2_CT0, 0, 0, div2, 2);
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i8254_load(devpriv->iobase1 + PCI224_Z2_CT0, 0,
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0, devpriv->cached_div2, 2);
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}
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static int pci224_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
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