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usb: musb: Perform only write access on MUSB_INTRRXE
This is part of the workaround for AM35x advisory Advisory 1.1.20. The advisory says that the IPSS bridge can't handle 8 & 16 bit read access. An 16bit read access to MUSB_INTRRXE results in an 32bit read access which also reads INTRUSB and therefore may lose interrupts. This patch uses a shadow register of MUSB_INTRRXE so we only perform write access to it. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Felipe Balbi <balbi@ti.com>
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@ -725,7 +725,8 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
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/* REVISIT HNP; just force disconnect */
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}
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musb_writew(musb->mregs, MUSB_INTRTXE, musb->epmask);
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musb_writew(musb->mregs, MUSB_INTRRXE, musb->epmask & 0xfffe);
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musb->intrrxe = musb->epmask & 0xfffe;
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musb_writew(musb->mregs, MUSB_INTRRXE, musb->intrrxe);
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musb_writeb(musb->mregs, MUSB_INTRUSBE, 0xf7);
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musb->port1_status &= ~(USB_PORT_STAT_LOW_SPEED
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|USB_PORT_STAT_HIGH_SPEED
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@ -947,7 +948,8 @@ void musb_start(struct musb *musb)
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/* Set INT enable registers, enable interrupts */
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musb_writew(regs, MUSB_INTRTXE, musb->epmask);
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musb_writew(regs, MUSB_INTRRXE, musb->epmask & 0xfffe);
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musb->intrrxe = musb->epmask & 0xfffe;
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musb_writew(regs, MUSB_INTRRXE, musb->intrrxe);
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musb_writeb(regs, MUSB_INTRUSBE, 0xf7);
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musb_writeb(regs, MUSB_TESTMODE, 0);
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@ -986,6 +988,7 @@ static void musb_generic_disable(struct musb *musb)
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/* disable interrupts */
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musb_writeb(mbase, MUSB_INTRUSBE, 0);
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musb_writew(mbase, MUSB_INTRTXE, 0);
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musb->intrrxe = 0;
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musb_writew(mbase, MUSB_INTRRXE, 0);
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/* off */
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@ -2122,7 +2125,6 @@ static void musb_save_context(struct musb *musb)
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musb->context.busctl = musb_read_ulpi_buscontrol(musb->mregs);
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musb->context.power = musb_readb(musb_base, MUSB_POWER);
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musb->context.intrtxe = musb_readw(musb_base, MUSB_INTRTXE);
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musb->context.intrrxe = musb_readw(musb_base, MUSB_INTRRXE);
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musb->context.intrusbe = musb_readb(musb_base, MUSB_INTRUSBE);
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musb->context.index = musb_readb(musb_base, MUSB_INDEX);
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musb->context.devctl = musb_readb(musb_base, MUSB_DEVCTL);
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@ -2196,7 +2198,7 @@ static void musb_restore_context(struct musb *musb)
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musb_write_ulpi_buscontrol(musb->mregs, musb->context.busctl);
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musb_writeb(musb_base, MUSB_POWER, musb->context.power);
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musb_writew(musb_base, MUSB_INTRTXE, musb->context.intrtxe);
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musb_writew(musb_base, MUSB_INTRRXE, musb->context.intrrxe);
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musb_writew(musb_base, MUSB_INTRRXE, musb->intrrxe);
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musb_writeb(musb_base, MUSB_INTRUSBE, musb->context.intrusbe);
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musb_writeb(musb_base, MUSB_DEVCTL, musb->context.devctl);
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@ -288,7 +288,7 @@ struct musb_csr_regs {
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struct musb_context_registers {
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u8 power;
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u16 intrtxe, intrrxe;
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u16 intrtxe;
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u8 intrusbe;
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u16 frame;
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u8 index, testmode;
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@ -313,6 +313,7 @@ struct musb {
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struct work_struct irq_work;
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u16 hwvers;
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u16 intrrxe;
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/* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
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#define MUSB_PORT_STAT_RESUME (1 << 31)
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@ -1108,7 +1108,6 @@ static int musb_gadget_enable(struct usb_ep *ep,
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musb_writew(regs, MUSB_TXCSR, csr);
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} else {
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u16 int_rxe = musb_readw(mbase, MUSB_INTRRXE);
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if (hw_ep->is_shared_fifo)
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musb_ep->is_in = 0;
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@ -1120,8 +1119,8 @@ static int musb_gadget_enable(struct usb_ep *ep,
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goto fail;
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}
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int_rxe |= (1 << epnum);
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musb_writew(mbase, MUSB_INTRRXE, int_rxe);
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musb->intrrxe |= (1 << epnum);
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musb_writew(mbase, MUSB_INTRRXE, musb->intrrxe);
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/* REVISIT if can_bulk_combine() use by updating "tmp"
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* likewise high bandwidth periodic rx
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@ -1214,9 +1213,8 @@ static int musb_gadget_disable(struct usb_ep *ep)
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musb_writew(musb->mregs, MUSB_INTRTXE, int_txe);
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musb_writew(epio, MUSB_TXMAXP, 0);
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} else {
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u16 int_rxe = musb_readw(musb->mregs, MUSB_INTRRXE);
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int_rxe &= ~(1 << epnum);
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musb_writew(musb->mregs, MUSB_INTRRXE, int_rxe);
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musb->intrrxe &= ~(1 << epnum);
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musb_writew(musb->mregs, MUSB_INTRRXE, musb->intrrxe);
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musb_writew(epio, MUSB_RXMAXP, 0);
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}
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