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Adds device tree nodes enabling DDR controller

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and bus master priority settings needed for
 stable LCDC operation on DA850.
 
 Also adds support for MUSB device on DA850
 providing USB OTG support.
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Merge tag 'davinci-for-v4.10/dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/dt

Pull "DaVinci DT updates for v4.10 (part 2)" from Sekhar Nori:

Adds device tree nodes enabling DDR controller
and bus master priority settings needed for
stable LCDC operation on DA850.

Also adds support for MUSB device on DA850
providing USB OTG support.

* tag 'davinci-for-v4.10/dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
  ARM: dts: da850-lcdk: Enable the usb otg device node
  ARM: dts: da850: Add the usb otg device node
  ARM: dts: da850: add the mstpri and ddrctl nodes
This commit is contained in:
Arnd Bergmann 2016-11-30 15:18:48 +01:00
commit aea09e5841
2 changed files with 26 additions and 0 deletions
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8
arch/arm/boot/dts/da850-lcdk.dts
View File

@ -158,6 +158,14 @@ &mcasp0 {
rx-num-evt = <32>;
};
&usb_phy {
status = "okay";
};
&usb0 {
status = "okay";
};
&aemif {
pinctrl-names = "default";
pinctrl-0 = <&nand_pins>;

18
arch/arm/boot/dts/da850.dtsi
View File

@ -210,6 +210,10 @@ lcd_pins: pinmux_lcd_pins {
};
};
prictrl: priority-controller@14110 {
compatible = "ti,da850-mstpri";
reg = <0x14110 0x0c>;
};
cfgchip: chip-controller@1417c {
compatible = "ti,da830-cfgchip", "syscon", "simple-mfd";
reg = <0x1417c 0x14>;
@ -384,6 +388,16 @@ spi1: spi@30e000 {
dma-names = "rx", "tx";
status = "disabled";
};
usb0: usb@200000 {
compatible = "ti,da830-musb";
reg = <0x200000 0x10000>;
interrupts = <58>;
interrupt-names = "mc";
dr_mode = "otg";
phys = <&usb_phy 0>;
phy-names = "usb-phy";
status = "disabled";
};
mdio: mdio@224000 {
compatible = "ti,davinci_mdio";
#address-cells = <1>;
@ -451,4 +465,8 @@ aemif: aemif@68000000 {
1 0 0x68000000 0x00008000>;
status = "disabled";
};
memctrl: memory-controller@b0000000 {
compatible = "ti,da850-ddr-controller";
reg = <0xb0000000 0xe8>;
};
};