AuxXxilium/linux_dsm_epyc7002
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x86, UV: Correct UV2 BAU destination timeout

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Correct the UV2 broacast assist unit's destination timeout
period. And the activation status register in UV2 should be
tested for a destination timeout with a 4, not a 2.  The values
for Active versus Timeout were reversed.

This patch is critical for TLB shootdown on an Altix UV2 system
(i.e. the follow-on to the current Altix UV).

 Destination timeout period:
  The period is set in 4 bits of memory-mapped register MISC_CONTROL.
  The left bit toggles base period between 10us and 80us.
  The other 3 bits are the multiplier.
 Decimal 15, hex f, gives the maximum: 7 * 80us

Signed-off-by: Cliff Wickman <cpw@sgi.com>
Link: http://lkml.kernel.org/r/20110621122243.117324443@sgi.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
cpw@sgi.com 2011-06-21 07:21:33 -05:00 committed by Ingo Molnar
parent bbd270e6f4
commit ae90c232be
1 changed files with 13 additions and 5 deletions
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18
arch/x86/include/asm/uv/uv_bau.h
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@ -67,7 +67,7 @@
* we're using 655us, similar to UV1: 65 units of 10us
*/
#define UV1_INTD_SOFT_ACK_TIMEOUT_PERIOD (9UL)
#define UV2_INTD_SOFT_ACK_TIMEOUT_PERIOD (65*10UL)
#define UV2_INTD_SOFT_ACK_TIMEOUT_PERIOD (15UL)
#define UV_INTD_SOFT_ACK_TIMEOUT_PERIOD (is_uv1_hub() ? \
UV1_INTD_SOFT_ACK_TIMEOUT_PERIOD : \
@ -106,12 +106,20 @@
#define DS_SOURCE_TIMEOUT 3
/*
* bits put together from HRP_LB_BAU_SB_ACTIVATION_STATUS_0/1/2
* values 1 and 5 will not occur
* values 1 and 3 will not occur
* Decoded meaning ERROR BUSY AUX ERR
* ------------------------------- ---- ----- -------
* IDLE 0 0 0
* BUSY (active) 0 1 0
* SW Ack Timeout (destination) 1 0 0
* SW Ack INTD rejected (strong NACK) 1 0 1
* Source Side Time Out Detected 1 1 0
* Destination Side PUT Failed 1 1 1
*/
#define UV2H_DESC_IDLE 0
#define UV2H_DESC_DEST_TIMEOUT 2
#define UV2H_DESC_DEST_STRONG_NACK 3
#define UV2H_DESC_BUSY 4
#define UV2H_DESC_BUSY 2
#define UV2H_DESC_DEST_TIMEOUT 4
#define UV2H_DESC_DEST_STRONG_NACK 5
#define UV2H_DESC_SOURCE_TIMEOUT 6
#define UV2H_DESC_DEST_PUT_ERR 7