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drm/amd/display: Adjust DML workaround threshold

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[Why]
There is a case where the margin is between 50 and 60, but applying the
workaround causes a hang. By increasing the threshold, we are blocking more
cases from switching p-state during active, but those cases will fall back
to switching during blank, which is fine.

[How]
 - increase required margin from 50 to 60

Signed-off-by: Joshua Aberback <joshua.aberback@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Joshua Aberback 2019-11-01 17:29:20 -04:00 committed by Alex Deucher
parent 2057b7e1cf
commit ad4e140e9b
2 changed files with 2 additions and 2 deletions
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2
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
View File

@ -2578,7 +2578,7 @@ static void dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPer
+ mode_lib->vba.DRAMClockChangeLatency;
if (mode_lib->vba.DRAMClockChangeSupportsVActive &&
mode_lib->vba.MinActiveDRAMClockChangeMargin > 50) {
mode_lib->vba.MinActiveDRAMClockChangeMargin > 60) {
mode_lib->vba.DRAMClockChangeWatermark += 25;
mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vactive;
} else {

2
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
View File

@ -2612,7 +2612,7 @@ static void dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndP
+ mode_lib->vba.DRAMClockChangeLatency;
if (mode_lib->vba.DRAMClockChangeSupportsVActive &&
mode_lib->vba.MinActiveDRAMClockChangeMargin > 50) {
mode_lib->vba.MinActiveDRAMClockChangeMargin > 60) {
mode_lib->vba.DRAMClockChangeWatermark += 25;
mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vactive;
} else if (mode_lib->vba.DummyPStateCheck &&