mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-26 05:20:53 +07:00
Merge branch 'for_3.8/dts' of git://git.kernel.org/pub/scm/linux/kernel/git/bcousson/linux-omap-dt into omap-for-v3.8/dt
This commit is contained in:
Tony Lindgren
commit
ad3252556f
15
Documentation/devicetree/bindings/arm/omap/counter.txt
Normal file
15
Documentation/devicetree/bindings/arm/omap/counter.txt
Normal file
@ -0,0 +1,15 @@
|
||||
OMAP Counter-32K bindings
|
||||
|
||||
Required properties:
|
||||
- compatible: Must be "ti,omap-counter32k" for OMAP controllers
|
||||
- reg: Contains timer register address range (base address and length)
|
||||
- ti,hwmods: Name of the hwmod associated to the counter, which is typically
|
||||
"counter_32k"
|
||||
|
||||
Example:
|
||||
|
||||
counter32k: counter@4a304000 {
|
||||
compatible = "ti,omap-counter32k";
|
||||
reg = <0x4a304000 0x20>;
|
||||
ti,hwmods = "counter_32k";
|
||||
};
|
||||
31
Documentation/devicetree/bindings/arm/omap/timer.txt
Normal file
31
Documentation/devicetree/bindings/arm/omap/timer.txt
Normal file
@ -0,0 +1,31 @@
|
||||
OMAP Timer bindings
|
||||
|
||||
Required properties:
|
||||
- compatible: Must be "ti,omap2-timer" for OMAP2+ controllers.
|
||||
- reg: Contains timer register address range (base address and
|
||||
length).
|
||||
- interrupts: Contains the interrupt information for the timer. The
|
||||
format is being dependent on which interrupt controller
|
||||
the OMAP device uses.
|
||||
- ti,hwmods: Name of the hwmod associated to the timer, "timer<X>",
|
||||
where <X> is the instance number of the timer from the
|
||||
HW spec.
|
||||
|
||||
Optional properties:
|
||||
- ti,timer-alwon: Indicates the timer is in an alway-on power domain.
|
||||
- ti,timer-dsp: Indicates the timer can interrupt the on-chip DSP in
|
||||
addition to the ARM CPU.
|
||||
- ti,timer-pwm: Indicates the timer can generate a PWM output.
|
||||
- ti,timer-secure: Indicates the timer is reserved on a secure OMAP device
|
||||
and therefore cannot be used by the kernel.
|
||||
|
||||
Example:
|
||||
|
||||
timer12: timer@48304000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48304000 0x400>;
|
||||
interrupts = <95>;
|
||||
ti,hwmods = "timer12"
|
||||
ti,timer-alwon;
|
||||
ti,timer-secure;
|
||||
};
|
||||
@ -2,9 +2,27 @@
|
||||
|
||||
properties:
|
||||
- compatible : Should be "ti,omap-ocp2scp"
|
||||
- reg : Address and length of the register set for the device
|
||||
- #address-cells, #size-cells : Must be present if the device has sub-nodes
|
||||
- ranges : the child address space are mapped 1:1 onto the parent address space
|
||||
- ti,hwmods : must be "ocp2scp_usb_phy"
|
||||
|
||||
Sub-nodes:
|
||||
All the devices connected to ocp2scp are described using sub-node to ocp2scp
|
||||
|
||||
ocp2scp@4a0ad000 {
|
||||
compatible = "ti,omap-ocp2scp";
|
||||
reg = <0x4a0ad000 0x1f>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
ti,hwmods = "ocp2scp_usb_phy";
|
||||
|
||||
subnode1 {
|
||||
...
|
||||
};
|
||||
|
||||
subnode2 {
|
||||
...
|
||||
};
|
||||
};
|
||||
|
||||
@ -55,5 +55,7 @@ st-micro,24c256 i2c serial eeprom (24cxx)
|
||||
stm,m41t00 Serial Access TIMEKEEPER
|
||||
stm,m41t62 Serial real-time clock (RTC) with alarm
|
||||
stm,m41t80 M41T80 - SERIAL ACCESS RTC WITH ALARMS
|
||||
taos,tsl2550 Ambient Light Sensor with SMBUS/Two Wire Serial Interface
|
||||
ti,tsc2003 I2C Touch-Screen Controller
|
||||
ti,tmp102 Low Power Digital Temperature Sensor with SMBUS/Two Wire Serial Interface
|
||||
ti,tmp275 Digital Temperature Sensor
|
||||
|
||||
@ -63,12 +63,13 @@ dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \
|
||||
imx28-m28evk.dtb \
|
||||
imx28-tx28.dtb
|
||||
dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
|
||||
omap3-beagle.dtb \
|
||||
omap3-beagle-xm.dtb \
|
||||
omap3-evm.dtb \
|
||||
omap3-tobi.dtb \
|
||||
omap4-panda.dtb \
|
||||
omap4-pandaES.dtb \
|
||||
omap4-var_som.dtb \
|
||||
omap4-panda-es.dtb \
|
||||
omap4-var-som.dtb \
|
||||
omap4-sdp.dtb \
|
||||
omap5-evm.dtb \
|
||||
am335x-evm.dtb \
|
||||
|
||||
@ -13,6 +13,12 @@ / {
|
||||
model = "TI AM335x BeagleBone";
|
||||
compatible = "ti,am335x-bone", "ti,am33xx";
|
||||
|
||||
cpus {
|
||||
cpu@0 {
|
||||
cpu0-supply = <&dcdc2_reg>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x10000000>; /* 256 MB */
|
||||
|
||||
@ -13,6 +13,12 @@ / {
|
||||
model = "TI AM335x EVM";
|
||||
compatible = "ti,am335x-evm", "ti,am33xx";
|
||||
|
||||
cpus {
|
||||
cpu@0 {
|
||||
cpu0-supply = <&vdd1_reg>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x10000000>; /* 256 MB */
|
||||
@ -31,6 +37,49 @@ tps: tps@2d {
|
||||
reg = <0x2d>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c2: i2c@4802a000 {
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
|
||||
lis331dlh: lis331dlh@18 {
|
||||
compatible = "st,lis331dlh", "st,lis3lv02d";
|
||||
reg = <0x18>;
|
||||
Vdd-supply = <&lis3_reg>;
|
||||
Vdd_IO-supply = <&lis3_reg>;
|
||||
|
||||
st,click-single-x;
|
||||
st,click-single-y;
|
||||
st,click-single-z;
|
||||
st,click-thresh-x = <10>;
|
||||
st,click-thresh-y = <10>;
|
||||
st,click-thresh-z = <10>;
|
||||
st,irq1-click;
|
||||
st,irq2-click;
|
||||
st,wakeup-x-lo;
|
||||
st,wakeup-x-hi;
|
||||
st,wakeup-y-lo;
|
||||
st,wakeup-y-hi;
|
||||
st,wakeup-z-lo;
|
||||
st,wakeup-z-hi;
|
||||
st,min-limit-x = <120>;
|
||||
st,min-limit-y = <120>;
|
||||
st,min-limit-z = <140>;
|
||||
st,max-limit-x = <550>;
|
||||
st,max-limit-y = <550>;
|
||||
st,max-limit-z = <750>;
|
||||
};
|
||||
|
||||
tsl2550: tsl2550@39 {
|
||||
compatible = "taos,tsl2550";
|
||||
reg = <0x39>;
|
||||
};
|
||||
|
||||
tmp275: tmp275@48 {
|
||||
compatible = "ti,tmp275";
|
||||
reg = <0x48>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
vbat: fixedregulator@0 {
|
||||
@ -40,6 +89,12 @@ vbat: fixedregulator@0 {
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
lis3_reg: fixedregulator@1 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "lis3_reg";
|
||||
regulator-boot-on;
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "tps65910.dtsi"
|
||||
|
||||
166
arch/arm/boot/dts/am335x-evmsk.dts
Normal file
166
arch/arm/boot/dts/am335x-evmsk.dts
Normal file
@ -0,0 +1,166 @@
|
||||
/*
|
||||
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
/*
|
||||
* AM335x Starter Kit
|
||||
* http://www.ti.com/tool/tmdssk3358
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/include/ "am33xx.dtsi"
|
||||
|
||||
/ {
|
||||
model = "TI AM335x EVM-SK";
|
||||
compatible = "ti,am335x-evmsk", "ti,am33xx";
|
||||
|
||||
cpus {
|
||||
cpu@0 {
|
||||
cpu0-supply = <&vdd1_reg>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x10000000>; /* 256 MB */
|
||||
};
|
||||
|
||||
ocp {
|
||||
uart1: serial@44e09000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
i2c1: i2c@44e0b000 {
|
||||
status = "okay";
|
||||
clock-frequency = <400000>;
|
||||
|
||||
tps: tps@2d {
|
||||
reg = <0x2d>;
|
||||
};
|
||||
|
||||
lis331dlh: lis331dlh@18 {
|
||||
compatible = "st,lis331dlh", "st,lis3lv02d";
|
||||
reg = <0x18>;
|
||||
Vdd-supply = <&lis3_reg>;
|
||||
Vdd_IO-supply = <&lis3_reg>;
|
||||
|
||||
st,click-single-x;
|
||||
st,click-single-y;
|
||||
st,click-single-z;
|
||||
st,click-thresh-x = <10>;
|
||||
st,click-thresh-y = <10>;
|
||||
st,click-thresh-z = <10>;
|
||||
st,irq1-click;
|
||||
st,irq2-click;
|
||||
st,wakeup-x-lo;
|
||||
st,wakeup-x-hi;
|
||||
st,wakeup-y-lo;
|
||||
st,wakeup-y-hi;
|
||||
st,wakeup-z-lo;
|
||||
st,wakeup-z-hi;
|
||||
st,min-limit-x = <120>;
|
||||
st,min-limit-y = <120>;
|
||||
st,min-limit-z = <140>;
|
||||
st,max-limit-x = <550>;
|
||||
st,max-limit-y = <550>;
|
||||
st,max-limit-z = <750>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
vbat: fixedregulator@0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vbat";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
lis3_reg: fixedregulator@1 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "lis3_reg";
|
||||
regulator-boot-on;
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "tps65910.dtsi"
|
||||
|
||||
&tps {
|
||||
vcc1-supply = <&vbat>;
|
||||
vcc2-supply = <&vbat>;
|
||||
vcc3-supply = <&vbat>;
|
||||
vcc4-supply = <&vbat>;
|
||||
vcc5-supply = <&vbat>;
|
||||
vcc6-supply = <&vbat>;
|
||||
vcc7-supply = <&vbat>;
|
||||
vccio-supply = <&vbat>;
|
||||
|
||||
regulators {
|
||||
vrtc_reg: regulator@0 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vio_reg: regulator@1 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdd1_reg: regulator@2 {
|
||||
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
|
||||
regulator-name = "vdd_mpu";
|
||||
regulator-min-microvolt = <912500>;
|
||||
regulator-max-microvolt = <1312500>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdd2_reg: regulator@3 {
|
||||
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
|
||||
regulator-name = "vdd_core";
|
||||
regulator-min-microvolt = <912500>;
|
||||
regulator-max-microvolt = <1150000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdd3_reg: regulator@4 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdig1_reg: regulator@5 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdig2_reg: regulator@6 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vpll_reg: regulator@7 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdac_reg: regulator@8 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vaux1_reg: regulator@9 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vaux2_reg: regulator@10 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vaux33_reg: regulator@11 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vmmc_reg: regulator@12 {
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -12,6 +12,7 @@
|
||||
|
||||
/ {
|
||||
compatible = "ti,am33xx";
|
||||
interrupt-parent = <&intc>;
|
||||
|
||||
aliases {
|
||||
serial0 = &uart1;
|
||||
@ -25,6 +26,21 @@ aliases {
|
||||
cpus {
|
||||
cpu@0 {
|
||||
compatible = "arm,cortex-a8";
|
||||
|
||||
/*
|
||||
* To consider voltage drop between PMIC and SoC,
|
||||
* tolerance value is reduced to 2% from 4% and
|
||||
* voltage value is increased as a precaution.
|
||||
*/
|
||||
operating-points = <
|
||||
/* kHz uV */
|
||||
720000 1285000
|
||||
600000 1225000
|
||||
500000 1125000
|
||||
275000 1125000
|
||||
>;
|
||||
voltage-tolerance = <2>; /* 2 percentage */
|
||||
clock-latency = <300000>; /* From omap-cpufreq driver */
|
||||
};
|
||||
};
|
||||
|
||||
@ -40,6 +56,15 @@ mpu {
|
||||
};
|
||||
};
|
||||
|
||||
am33xx_pinmux: pinmux@44e10800 {
|
||||
compatible = "pinctrl-single";
|
||||
reg = <0x44e10800 0x0238>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-single,register-width = <32>;
|
||||
pinctrl-single,function-mask = <0x7f>;
|
||||
};
|
||||
|
||||
/*
|
||||
* XXX: Use a flat representation of the AM33XX interconnect.
|
||||
* The real AM33XX interconnect network is quite complex.Since
|
||||
@ -70,7 +95,6 @@ gpio1: gpio@44e07000 {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x44e07000 0x1000>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <96>;
|
||||
};
|
||||
|
||||
@ -82,7 +106,6 @@ gpio2: gpio@4804c000 {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x4804c000 0x1000>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <98>;
|
||||
};
|
||||
|
||||
@ -94,7 +117,6 @@ gpio3: gpio@481ac000 {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x481ac000 0x1000>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <32>;
|
||||
};
|
||||
|
||||
@ -106,7 +128,6 @@ gpio4: gpio@481ae000 {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x481ae000 0x1000>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <62>;
|
||||
};
|
||||
|
||||
@ -115,7 +136,6 @@ uart1: serial@44e09000 {
|
||||
ti,hwmods = "uart1";
|
||||
clock-frequency = <48000000>;
|
||||
reg = <0x44e09000 0x2000>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <72>;
|
||||
status = "disabled";
|
||||
};
|
||||
@ -125,7 +145,6 @@ uart2: serial@48022000 {
|
||||
ti,hwmods = "uart2";
|
||||
clock-frequency = <48000000>;
|
||||
reg = <0x48022000 0x2000>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <73>;
|
||||
status = "disabled";
|
||||
};
|
||||
@ -135,7 +154,6 @@ uart3: serial@48024000 {
|
||||
ti,hwmods = "uart3";
|
||||
clock-frequency = <48000000>;
|
||||
reg = <0x48024000 0x2000>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <74>;
|
||||
status = "disabled";
|
||||
};
|
||||
@ -145,7 +163,6 @@ uart4: serial@481a6000 {
|
||||
ti,hwmods = "uart4";
|
||||
clock-frequency = <48000000>;
|
||||
reg = <0x481a6000 0x2000>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <44>;
|
||||
status = "disabled";
|
||||
};
|
||||
@ -155,7 +172,6 @@ uart5: serial@481a8000 {
|
||||
ti,hwmods = "uart5";
|
||||
clock-frequency = <48000000>;
|
||||
reg = <0x481a8000 0x2000>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <45>;
|
||||
status = "disabled";
|
||||
};
|
||||
@ -165,7 +181,6 @@ uart6: serial@481aa000 {
|
||||
ti,hwmods = "uart6";
|
||||
clock-frequency = <48000000>;
|
||||
reg = <0x481aa000 0x2000>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <46>;
|
||||
status = "disabled";
|
||||
};
|
||||
@ -176,7 +191,6 @@ i2c1: i2c@44e0b000 {
|
||||
#size-cells = <0>;
|
||||
ti,hwmods = "i2c1";
|
||||
reg = <0x44e0b000 0x1000>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <70>;
|
||||
status = "disabled";
|
||||
};
|
||||
@ -187,7 +201,6 @@ i2c2: i2c@4802a000 {
|
||||
#size-cells = <0>;
|
||||
ti,hwmods = "i2c2";
|
||||
reg = <0x4802a000 0x1000>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <71>;
|
||||
status = "disabled";
|
||||
};
|
||||
@ -198,7 +211,6 @@ i2c3: i2c@4819c000 {
|
||||
#size-cells = <0>;
|
||||
ti,hwmods = "i2c3";
|
||||
reg = <0x4819c000 0x1000>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <30>;
|
||||
status = "disabled";
|
||||
};
|
||||
@ -207,8 +219,107 @@ wdt2: wdt@44e35000 {
|
||||
compatible = "ti,omap3-wdt";
|
||||
ti,hwmods = "wd_timer2";
|
||||
reg = <0x44e35000 0x1000>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <91>;
|
||||
};
|
||||
|
||||
dcan0: d_can@481cc000 {
|
||||
compatible = "bosch,d_can";
|
||||
ti,hwmods = "d_can0";
|
||||
reg = <0x481cc000 0x2000>;
|
||||
interrupts = <52>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dcan1: d_can@481d0000 {
|
||||
compatible = "bosch,d_can";
|
||||
ti,hwmods = "d_can1";
|
||||
reg = <0x481d0000 0x2000>;
|
||||
interrupts = <55>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
timer1: timer@44e31000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x44e31000 0x400>;
|
||||
interrupts = <67>;
|
||||
ti,hwmods = "timer1";
|
||||
ti,timer-alwon;
|
||||
};
|
||||
|
||||
timer2: timer@48040000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48040000 0x400>;
|
||||
interrupts = <68>;
|
||||
ti,hwmods = "timer2";
|
||||
};
|
||||
|
||||
timer3: timer@48042000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48042000 0x400>;
|
||||
interrupts = <69>;
|
||||
ti,hwmods = "timer3";
|
||||
};
|
||||
|
||||
timer4: timer@48044000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48044000 0x400>;
|
||||
interrupts = <92>;
|
||||
ti,hwmods = "timer4";
|
||||
ti,timer-pwm;
|
||||
};
|
||||
|
||||
timer5: timer@48046000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48046000 0x400>;
|
||||
interrupts = <93>;
|
||||
ti,hwmods = "timer5";
|
||||
ti,timer-pwm;
|
||||
};
|
||||
|
||||
timer6: timer@48048000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48048000 0x400>;
|
||||
interrupts = <94>;
|
||||
ti,hwmods = "timer6";
|
||||
ti,timer-pwm;
|
||||
};
|
||||
|
||||
timer7: timer@4804a000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4804a000 0x400>;
|
||||
interrupts = <95>;
|
||||
ti,hwmods = "timer7";
|
||||
ti,timer-pwm;
|
||||
};
|
||||
|
||||
rtc@44e3e000 {
|
||||
compatible = "ti,da830-rtc";
|
||||
reg = <0x44e3e000 0x1000>;
|
||||
interrupts = <75
|
||||
76>;
|
||||
ti,hwmods = "rtc";
|
||||
};
|
||||
|
||||
spi0: spi@48030000 {
|
||||
compatible = "ti,omap4-mcspi";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x48030000 0x400>;
|
||||
interrupt = <65>;
|
||||
ti,spi-num-cs = <2>;
|
||||
ti,hwmods = "spi0";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi1: spi@481a0000 {
|
||||
compatible = "ti,omap4-mcspi";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x481a0000 0x400>;
|
||||
interrupt = <125>;
|
||||
ti,spi-num-cs = <2>;
|
||||
ti,hwmods = "spi1";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -12,6 +12,7 @@
|
||||
|
||||
/ {
|
||||
compatible = "ti,omap2430", "ti,omap2420", "ti,omap2";
|
||||
interrupt-parent = <&intc>;
|
||||
|
||||
aliases {
|
||||
serial0 = &uart1;
|
||||
@ -65,5 +66,90 @@ uart3: serial@4806e000 {
|
||||
ti,hwmods = "uart3";
|
||||
clock-frequency = <48000000>;
|
||||
};
|
||||
|
||||
timer2: timer@4802a000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4802a000 0x400>;
|
||||
interrupts = <38>;
|
||||
ti,hwmods = "timer2";
|
||||
};
|
||||
|
||||
timer3: timer@48078000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48078000 0x400>;
|
||||
interrupts = <39>;
|
||||
ti,hwmods = "timer3";
|
||||
};
|
||||
|
||||
timer4: timer@4807a000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4807a000 0x400>;
|
||||
interrupts = <40>;
|
||||
ti,hwmods = "timer4";
|
||||
};
|
||||
|
||||
timer5: timer@4807c000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4807c000 0x400>;
|
||||
interrupts = <41>;
|
||||
ti,hwmods = "timer5";
|
||||
ti,timer-dsp;
|
||||
};
|
||||
|
||||
timer6: timer@4807e000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4807e000 0x400>;
|
||||
interrupts = <42>;
|
||||
ti,hwmods = "timer6";
|
||||
ti,timer-dsp;
|
||||
};
|
||||
|
||||
timer7: timer@48080000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48080000 0x400>;
|
||||
interrupts = <43>;
|
||||
ti,hwmods = "timer7";
|
||||
ti,timer-dsp;
|
||||
};
|
||||
|
||||
timer8: timer@48082000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48082000 0x400>;
|
||||
interrupts = <44>;
|
||||
ti,hwmods = "timer8";
|
||||
ti,timer-dsp;
|
||||
};
|
||||
|
||||
timer9: timer@48084000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48084000 0x400>;
|
||||
interrupts = <45>;
|
||||
ti,hwmods = "timer9";
|
||||
ti,timer-pwm;
|
||||
};
|
||||
|
||||
timer10: timer@48086000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48086000 0x400>;
|
||||
interrupts = <46>;
|
||||
ti,hwmods = "timer10";
|
||||
ti,timer-pwm;
|
||||
};
|
||||
|
||||
timer11: timer@48088000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48088000 0x400>;
|
||||
interrupts = <47>;
|
||||
ti,hwmods = "timer11";
|
||||
ti,timer-pwm;
|
||||
};
|
||||
|
||||
timer12: timer@4808a000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4808a000 0x400>;
|
||||
interrupts = <48>;
|
||||
ti,hwmods = "timer12";
|
||||
ti,timer-pwm;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -14,6 +14,12 @@ / {
|
||||
compatible = "ti,omap2420", "ti,omap2";
|
||||
|
||||
ocp {
|
||||
counter32k: counter@48004000 {
|
||||
compatible = "ti,omap-counter32k";
|
||||
reg = <0x48004000 0x20>;
|
||||
ti,hwmods = "counter_32k";
|
||||
};
|
||||
|
||||
omap2420_pmx: pinmux@48000030 {
|
||||
compatible = "ti,omap2420-padconf", "pinctrl-single";
|
||||
reg = <0x48000030 0x0113>;
|
||||
@ -30,7 +36,6 @@ mcbsp1: mcbsp@48074000 {
|
||||
interrupts = <59>, /* TX interrupt */
|
||||
<60>; /* RX interrupt */
|
||||
interrupt-names = "tx", "rx";
|
||||
interrupt-parent = <&intc>;
|
||||
ti,hwmods = "mcbsp1";
|
||||
};
|
||||
|
||||
@ -41,8 +46,15 @@ mcbsp2: mcbsp@48076000 {
|
||||
interrupts = <62>, /* TX interrupt */
|
||||
<63>; /* RX interrupt */
|
||||
interrupt-names = "tx", "rx";
|
||||
interrupt-parent = <&intc>;
|
||||
ti,hwmods = "mcbsp2";
|
||||
};
|
||||
|
||||
timer1: timer@48028000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48028000 0x400>;
|
||||
interrupts = <37>;
|
||||
ti,hwmods = "timer1";
|
||||
ti,timer-alwon;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -14,6 +14,12 @@ / {
|
||||
compatible = "ti,omap2430", "ti,omap2";
|
||||
|
||||
ocp {
|
||||
counter32k: counter@49020000 {
|
||||
compatible = "ti,omap-counter32k";
|
||||
reg = <0x49020000 0x20>;
|
||||
ti,hwmods = "counter_32k";
|
||||
};
|
||||
|
||||
omap2430_pmx: pinmux@49002030 {
|
||||
compatible = "ti,omap2430-padconf", "pinctrl-single";
|
||||
reg = <0x49002030 0x0154>;
|
||||
@ -32,7 +38,6 @@ mcbsp1: mcbsp@48074000 {
|
||||
<60>, /* RX interrupt */
|
||||
<61>; /* RX overflow interrupt */
|
||||
interrupt-names = "common", "tx", "rx", "rx_overflow";
|
||||
interrupt-parent = <&intc>;
|
||||
ti,buffer-size = <128>;
|
||||
ti,hwmods = "mcbsp1";
|
||||
};
|
||||
@ -45,7 +50,6 @@ mcbsp2: mcbsp@48076000 {
|
||||
<62>, /* TX interrupt */
|
||||
<63>; /* RX interrupt */
|
||||
interrupt-names = "common", "tx", "rx";
|
||||
interrupt-parent = <&intc>;
|
||||
ti,buffer-size = <128>;
|
||||
ti,hwmods = "mcbsp2";
|
||||
};
|
||||
@ -58,7 +62,6 @@ mcbsp3: mcbsp@4808c000 {
|
||||
<89>, /* TX interrupt */
|
||||
<90>; /* RX interrupt */
|
||||
interrupt-names = "common", "tx", "rx";
|
||||
interrupt-parent = <&intc>;
|
||||
ti,buffer-size = <128>;
|
||||
ti,hwmods = "mcbsp3";
|
||||
};
|
||||
@ -71,7 +74,6 @@ mcbsp4: mcbsp@4808e000 {
|
||||
<54>, /* TX interrupt */
|
||||
<55>; /* RX interrupt */
|
||||
interrupt-names = "common", "tx", "rx";
|
||||
interrupt-parent = <&intc>;
|
||||
ti,buffer-size = <128>;
|
||||
ti,hwmods = "mcbsp4";
|
||||
};
|
||||
@ -84,9 +86,16 @@ mcbsp5: mcbsp@48096000 {
|
||||
<81>, /* TX interrupt */
|
||||
<82>; /* RX interrupt */
|
||||
interrupt-names = "common", "tx", "rx";
|
||||
interrupt-parent = <&intc>;
|
||||
ti,buffer-size = <128>;
|
||||
ti,hwmods = "mcbsp5";
|
||||
};
|
||||
|
||||
timer1: timer@49018000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x49018000 0x400>;
|
||||
interrupts = <37>;
|
||||
ti,hwmods = "timer1";
|
||||
ti,timer-alwon;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -55,12 +55,6 @@ twl: twl@48 {
|
||||
interrupts = <7>; /* SYS_NIRQ cascaded to intc */
|
||||
interrupt-parent = <&intc>;
|
||||
|
||||
vsim: regulator-vsim {
|
||||
compatible = "ti,twl4030-vsim";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
};
|
||||
|
||||
twl_audio: audio {
|
||||
compatible = "ti,twl4030-audio";
|
||||
codec {
|
||||
|
||||
67
arch/arm/boot/dts/omap3-beagle.dts
Normal file
67
arch/arm/boot/dts/omap3-beagle.dts
Normal file
@ -0,0 +1,67 @@
|
||||
/*
|
||||
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
/dts-v1/;
|
||||
|
||||
/include/ "omap3.dtsi"
|
||||
|
||||
/ {
|
||||
model = "TI OMAP3 BeagleBoard";
|
||||
compatible = "ti,omap3-beagle", "ti,omap3";
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x10000000>; /* 256 MB */
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pmu_stat {
|
||||
label = "beagleboard::pmu_stat";
|
||||
gpios = <&twl_gpio 19 0>; /* LEDB */
|
||||
};
|
||||
|
||||
heartbeat {
|
||||
label = "beagleboard::usr0";
|
||||
gpios = <&gpio5 22 0>; /* 150 -> D6 LED */
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
mmc {
|
||||
label = "beagleboard::usr1";
|
||||
gpios = <&gpio5 21 0>; /* 149 -> D7 LED */
|
||||
linux,default-trigger = "mmc0";
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <2600000>;
|
||||
|
||||
twl: twl@48 {
|
||||
reg = <0x48>;
|
||||
interrupts = <7>; /* SYS_NIRQ cascaded to intc */
|
||||
interrupt-parent = <&intc>;
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "twl4030.dtsi"
|
||||
|
||||
&mmc1 {
|
||||
vmmc-supply = <&vmmc1>;
|
||||
vmmc_aux-supply = <&vsim>;
|
||||
bus-width = <8>;
|
||||
};
|
||||
|
||||
&mmc2 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&mmc3 {
|
||||
status = "disabled";
|
||||
};
|
||||
@ -12,6 +12,7 @@
|
||||
|
||||
/ {
|
||||
compatible = "ti,omap3430", "ti,omap3";
|
||||
interrupt-parent = <&intc>;
|
||||
|
||||
aliases {
|
||||
serial0 = &uart1;
|
||||
@ -60,6 +61,12 @@ ocp {
|
||||
ranges;
|
||||
ti,hwmods = "l3_main";
|
||||
|
||||
counter32k: counter@48320000 {
|
||||
compatible = "ti,omap-counter32k";
|
||||
reg = <0x48320000 0x20>;
|
||||
ti,hwmods = "counter_32k";
|
||||
};
|
||||
|
||||
intc: interrupt-controller@48200000 {
|
||||
compatible = "ti,omap2-intc";
|
||||
interrupt-controller;
|
||||
@ -240,7 +247,6 @@ mcbsp1: mcbsp@48074000 {
|
||||
<59>, /* TX interrupt */
|
||||
<60>; /* RX interrupt */
|
||||
interrupt-names = "common", "tx", "rx";
|
||||
interrupt-parent = <&intc>;
|
||||
ti,buffer-size = <128>;
|
||||
ti,hwmods = "mcbsp1";
|
||||
};
|
||||
@ -255,7 +261,6 @@ mcbsp2: mcbsp@49022000 {
|
||||
<63>, /* RX interrupt */
|
||||
<4>; /* Sidetone */
|
||||
interrupt-names = "common", "tx", "rx", "sidetone";
|
||||
interrupt-parent = <&intc>;
|
||||
ti,buffer-size = <1280>;
|
||||
ti,hwmods = "mcbsp2", "mcbsp2_sidetone";
|
||||
};
|
||||
@ -270,7 +275,6 @@ mcbsp3: mcbsp@49024000 {
|
||||
<90>, /* RX interrupt */
|
||||
<5>; /* Sidetone */
|
||||
interrupt-names = "common", "tx", "rx", "sidetone";
|
||||
interrupt-parent = <&intc>;
|
||||
ti,buffer-size = <128>;
|
||||
ti,hwmods = "mcbsp3", "mcbsp3_sidetone";
|
||||
};
|
||||
@ -283,7 +287,6 @@ mcbsp4: mcbsp@49026000 {
|
||||
<54>, /* TX interrupt */
|
||||
<55>; /* RX interrupt */
|
||||
interrupt-names = "common", "tx", "rx";
|
||||
interrupt-parent = <&intc>;
|
||||
ti,buffer-size = <128>;
|
||||
ti,hwmods = "mcbsp4";
|
||||
};
|
||||
@ -296,9 +299,103 @@ mcbsp5: mcbsp@48096000 {
|
||||
<81>, /* TX interrupt */
|
||||
<82>; /* RX interrupt */
|
||||
interrupt-names = "common", "tx", "rx";
|
||||
interrupt-parent = <&intc>;
|
||||
ti,buffer-size = <128>;
|
||||
ti,hwmods = "mcbsp5";
|
||||
};
|
||||
|
||||
timer1: timer@48318000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48318000 0x400>;
|
||||
interrupts = <37>;
|
||||
ti,hwmods = "timer1";
|
||||
ti,timer-alwon;
|
||||
};
|
||||
|
||||
timer2: timer@49032000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x49032000 0x400>;
|
||||
interrupts = <38>;
|
||||
ti,hwmods = "timer2";
|
||||
};
|
||||
|
||||
timer3: timer@49034000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x49034000 0x400>;
|
||||
interrupts = <39>;
|
||||
ti,hwmods = "timer3";
|
||||
};
|
||||
|
||||
timer4: timer@49036000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x49036000 0x400>;
|
||||
interrupts = <40>;
|
||||
ti,hwmods = "timer4";
|
||||
};
|
||||
|
||||
timer5: timer@49038000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x49038000 0x400>;
|
||||
interrupts = <41>;
|
||||
ti,hwmods = "timer5";
|
||||
ti,timer-dsp;
|
||||
};
|
||||
|
||||
timer6: timer@4903a000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4903a000 0x400>;
|
||||
interrupts = <42>;
|
||||
ti,hwmods = "timer6";
|
||||
ti,timer-dsp;
|
||||
};
|
||||
|
||||
timer7: timer@4903c000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4903c000 0x400>;
|
||||
interrupts = <43>;
|
||||
ti,hwmods = "timer7";
|
||||
ti,timer-dsp;
|
||||
};
|
||||
|
||||
timer8: timer@4903e000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4903e000 0x400>;
|
||||
interrupts = <44>;
|
||||
ti,hwmods = "timer8";
|
||||
ti,timer-pwm;
|
||||
ti,timer-dsp;
|
||||
};
|
||||
|
||||
timer9: timer@49040000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x49040000 0x400>;
|
||||
interrupts = <45>;
|
||||
ti,hwmods = "timer9";
|
||||
ti,timer-pwm;
|
||||
};
|
||||
|
||||
timer10: timer@48086000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48086000 0x400>;
|
||||
interrupts = <46>;
|
||||
ti,hwmods = "timer10";
|
||||
ti,timer-pwm;
|
||||
};
|
||||
|
||||
timer11: timer@48088000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48088000 0x400>;
|
||||
interrupts = <47>;
|
||||
ti,hwmods = "timer11";
|
||||
ti,timer-pwm;
|
||||
};
|
||||
|
||||
timer12: timer@48304000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48304000 0x400>;
|
||||
interrupts = <95>;
|
||||
ti,hwmods = "timer12";
|
||||
ti,timer-alwon;
|
||||
ti,timer-secure;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -184,3 +184,7 @@ &mcbsp3 {
|
||||
&dmic {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&twl_usb_comparator {
|
||||
usb-supply = <&vusb>;
|
||||
};
|
||||
|
||||
@ -406,3 +406,7 @@ &uart4 {
|
||||
&mcbsp3 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&twl_usb_comparator {
|
||||
usb-supply = <&vusb>;
|
||||
};
|
||||
|
||||
@ -95,6 +95,12 @@ ocp {
|
||||
ranges;
|
||||
ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
|
||||
|
||||
counter32k: counter@4a304000 {
|
||||
compatible = "ti,omap-counter32k";
|
||||
reg = <0x4a304000 0x20>;
|
||||
ti,hwmods = "counter_32k";
|
||||
};
|
||||
|
||||
omap4_pmx_core: pinmux@4a100040 {
|
||||
compatible = "ti,omap4-padconf", "pinctrl-single";
|
||||
reg = <0x4a100040 0x0196>;
|
||||
@ -340,7 +346,6 @@ mcpdm: mcpdm@40132000 {
|
||||
<0x49032000 0x7f>; /* L3 Interconnect */
|
||||
reg-names = "mpu", "dma";
|
||||
interrupts = <0 112 0x4>;
|
||||
interrupt-parent = <&gic>;
|
||||
ti,hwmods = "mcpdm";
|
||||
};
|
||||
|
||||
@ -350,7 +355,6 @@ dmic: dmic@4012e000 {
|
||||
<0x4902e000 0x7f>; /* L3 Interconnect */
|
||||
reg-names = "mpu", "dma";
|
||||
interrupts = <0 114 0x4>;
|
||||
interrupt-parent = <&gic>;
|
||||
ti,hwmods = "dmic";
|
||||
};
|
||||
|
||||
@ -361,7 +365,6 @@ mcbsp1: mcbsp@40122000 {
|
||||
reg-names = "mpu", "dma";
|
||||
interrupts = <0 17 0x4>;
|
||||
interrupt-names = "common";
|
||||
interrupt-parent = <&gic>;
|
||||
ti,buffer-size = <128>;
|
||||
ti,hwmods = "mcbsp1";
|
||||
};
|
||||
@ -373,7 +376,6 @@ mcbsp2: mcbsp@40124000 {
|
||||
reg-names = "mpu", "dma";
|
||||
interrupts = <0 22 0x4>;
|
||||
interrupt-names = "common";
|
||||
interrupt-parent = <&gic>;
|
||||
ti,buffer-size = <128>;
|
||||
ti,hwmods = "mcbsp2";
|
||||
};
|
||||
@ -385,7 +387,6 @@ mcbsp3: mcbsp@40126000 {
|
||||
reg-names = "mpu", "dma";
|
||||
interrupts = <0 23 0x4>;
|
||||
interrupt-names = "common";
|
||||
interrupt-parent = <&gic>;
|
||||
ti,buffer-size = <128>;
|
||||
ti,hwmods = "mcbsp3";
|
||||
};
|
||||
@ -396,7 +397,6 @@ mcbsp4: mcbsp@48096000 {
|
||||
reg-names = "mpu";
|
||||
interrupts = <0 16 0x4>;
|
||||
interrupt-names = "common";
|
||||
interrupt-parent = <&gic>;
|
||||
ti,buffer-size = <128>;
|
||||
ti,hwmods = "mcbsp4";
|
||||
};
|
||||
@ -431,12 +431,103 @@ emif2: emif@4d000000 {
|
||||
hw-caps-temp-alert;
|
||||
};
|
||||
|
||||
ocp2scp {
|
||||
ocp2scp@4a0ad000 {
|
||||
compatible = "ti,omap-ocp2scp";
|
||||
reg = <0x4a0ad000 0x1f>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
ti,hwmods = "ocp2scp_usb_phy";
|
||||
};
|
||||
|
||||
timer1: timer@4a318000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4a318000 0x80>;
|
||||
interrupts = <0 37 0x4>;
|
||||
ti,hwmods = "timer1";
|
||||
ti,timer-alwon;
|
||||
};
|
||||
|
||||
timer2: timer@48032000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48032000 0x80>;
|
||||
interrupts = <0 38 0x4>;
|
||||
ti,hwmods = "timer2";
|
||||
};
|
||||
|
||||
timer3: timer@48034000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48034000 0x80>;
|
||||
interrupts = <0 39 0x4>;
|
||||
ti,hwmods = "timer3";
|
||||
};
|
||||
|
||||
timer4: timer@48036000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48036000 0x80>;
|
||||
interrupts = <0 40 0x4>;
|
||||
ti,hwmods = "timer4";
|
||||
};
|
||||
|
||||
timer5: timer@40138000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x40138000 0x80>,
|
||||
<0x49038000 0x80>;
|
||||
interrupts = <0 41 0x4>;
|
||||
ti,hwmods = "timer5";
|
||||
ti,timer-dsp;
|
||||
};
|
||||
|
||||
timer6: timer@4013a000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4013a000 0x80>,
|
||||
<0x4903a000 0x80>;
|
||||
interrupts = <0 42 0x4>;
|
||||
ti,hwmods = "timer6";
|
||||
ti,timer-dsp;
|
||||
};
|
||||
|
||||
timer7: timer@4013c000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4013c000 0x80>,
|
||||
<0x4903c000 0x80>;
|
||||
interrupts = <0 43 0x4>;
|
||||
ti,hwmods = "timer7";
|
||||
ti,timer-dsp;
|
||||
};
|
||||
|
||||
timer8: timer@4013e000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4013e000 0x80>,
|
||||
<0x4903e000 0x80>;
|
||||
interrupts = <0 44 0x4>;
|
||||
ti,hwmods = "timer8";
|
||||
ti,timer-pwm;
|
||||
ti,timer-dsp;
|
||||
};
|
||||
|
||||
timer9: timer@4803e000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4803e000 0x80>;
|
||||
interrupts = <0 45 0x4>;
|
||||
ti,hwmods = "timer9";
|
||||
ti,timer-pwm;
|
||||
};
|
||||
|
||||
timer10: timer@48086000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48086000 0x80>;
|
||||
interrupts = <0 46 0x4>;
|
||||
ti,hwmods = "timer10";
|
||||
ti,timer-pwm;
|
||||
};
|
||||
|
||||
timer11: timer@48088000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48088000 0x80>;
|
||||
interrupts = <0 47 0x4>;
|
||||
ti,hwmods = "timer11";
|
||||
ti,timer-pwm;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -77,6 +77,12 @@ ocp {
|
||||
ranges;
|
||||
ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
|
||||
|
||||
counter32k: counter@4ae04000 {
|
||||
compatible = "ti,omap-counter32k";
|
||||
reg = <0x4ae04000 0x40>;
|
||||
ti,hwmods = "counter_32k";
|
||||
};
|
||||
|
||||
omap5_pmx_core: pinmux@4a002840 {
|
||||
compatible = "ti,omap4-padconf", "pinctrl-single";
|
||||
reg = <0x4a002840 0x01b6>;
|
||||
@ -104,6 +110,8 @@ gic: interrupt-controller@48211000 {
|
||||
|
||||
gpio1: gpio@4ae10000 {
|
||||
compatible = "ti,omap4-gpio";
|
||||
reg = <0x4ae10000 0x200>;
|
||||
interrupts = <0 29 0x4>;
|
||||
ti,hwmods = "gpio1";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
@ -113,6 +121,8 @@ gpio1: gpio@4ae10000 {
|
||||
|
||||
gpio2: gpio@48055000 {
|
||||
compatible = "ti,omap4-gpio";
|
||||
reg = <0x48055000 0x200>;
|
||||
interrupts = <0 30 0x4>;
|
||||
ti,hwmods = "gpio2";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
@ -122,6 +132,8 @@ gpio2: gpio@48055000 {
|
||||
|
||||
gpio3: gpio@48057000 {
|
||||
compatible = "ti,omap4-gpio";
|
||||
reg = <0x48057000 0x200>;
|
||||
interrupts = <0 31 0x4>;
|
||||
ti,hwmods = "gpio3";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
@ -131,6 +143,8 @@ gpio3: gpio@48057000 {
|
||||
|
||||
gpio4: gpio@48059000 {
|
||||
compatible = "ti,omap4-gpio";
|
||||
reg = <0x48059000 0x200>;
|
||||
interrupts = <0 32 0x4>;
|
||||
ti,hwmods = "gpio4";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
@ -140,6 +154,8 @@ gpio4: gpio@48059000 {
|
||||
|
||||
gpio5: gpio@4805b000 {
|
||||
compatible = "ti,omap4-gpio";
|
||||
reg = <0x4805b000 0x200>;
|
||||
interrupts = <0 33 0x4>;
|
||||
ti,hwmods = "gpio5";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
@ -149,6 +165,8 @@ gpio5: gpio@4805b000 {
|
||||
|
||||
gpio6: gpio@4805d000 {
|
||||
compatible = "ti,omap4-gpio";
|
||||
reg = <0x4805d000 0x200>;
|
||||
interrupts = <0 34 0x4>;
|
||||
ti,hwmods = "gpio6";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
@ -158,6 +176,8 @@ gpio6: gpio@4805d000 {
|
||||
|
||||
gpio7: gpio@48051000 {
|
||||
compatible = "ti,omap4-gpio";
|
||||
reg = <0x48051000 0x200>;
|
||||
interrupts = <0 35 0x4>;
|
||||
ti,hwmods = "gpio7";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
@ -167,6 +187,8 @@ gpio7: gpio@48051000 {
|
||||
|
||||
gpio8: gpio@48053000 {
|
||||
compatible = "ti,omap4-gpio";
|
||||
reg = <0x48053000 0x200>;
|
||||
interrupts = <0 121 0x4>;
|
||||
ti,hwmods = "gpio8";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
@ -176,6 +198,8 @@ gpio8: gpio@48053000 {
|
||||
|
||||
i2c1: i2c@48070000 {
|
||||
compatible = "ti,omap4-i2c";
|
||||
reg = <0x48070000 0x100>;
|
||||
interrupts = <0 56 0x4>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
ti,hwmods = "i2c1";
|
||||
@ -183,6 +207,8 @@ i2c1: i2c@48070000 {
|
||||
|
||||
i2c2: i2c@48072000 {
|
||||
compatible = "ti,omap4-i2c";
|
||||
reg = <0x48072000 0x100>;
|
||||
interrupts = <0 57 0x4>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
ti,hwmods = "i2c2";
|
||||
@ -190,20 +216,26 @@ i2c2: i2c@48072000 {
|
||||
|
||||
i2c3: i2c@48060000 {
|
||||
compatible = "ti,omap4-i2c";
|
||||
reg = <0x48060000 0x100>;
|
||||
interrupts = <0 61 0x4>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
ti,hwmods = "i2c3";
|
||||
};
|
||||
|
||||
i2c4: i2c@4807A000 {
|
||||
i2c4: i2c@4807a000 {
|
||||
compatible = "ti,omap4-i2c";
|
||||
reg = <0x4807a000 0x100>;
|
||||
interrupts = <0 62 0x4>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
ti,hwmods = "i2c4";
|
||||
};
|
||||
|
||||
i2c5: i2c@4807C000 {
|
||||
i2c5: i2c@4807c000 {
|
||||
compatible = "ti,omap4-i2c";
|
||||
reg = <0x4807c000 0x100>;
|
||||
interrupts = <0 60 0x4>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
ti,hwmods = "i2c5";
|
||||
@ -211,42 +243,56 @@ i2c5: i2c@4807C000 {
|
||||
|
||||
uart1: serial@4806a000 {
|
||||
compatible = "ti,omap4-uart";
|
||||
reg = <0x4806a000 0x100>;
|
||||
interrupts = <0 72 0x4>;
|
||||
ti,hwmods = "uart1";
|
||||
clock-frequency = <48000000>;
|
||||
};
|
||||
|
||||
uart2: serial@4806c000 {
|
||||
compatible = "ti,omap4-uart";
|
||||
reg = <0x4806c000 0x100>;
|
||||
interrupts = <0 73 0x4>;
|
||||
ti,hwmods = "uart2";
|
||||
clock-frequency = <48000000>;
|
||||
};
|
||||
|
||||
uart3: serial@48020000 {
|
||||
compatible = "ti,omap4-uart";
|
||||
reg = <0x48020000 0x100>;
|
||||
interrupts = <0 74 0x4>;
|
||||
ti,hwmods = "uart3";
|
||||
clock-frequency = <48000000>;
|
||||
};
|
||||
|
||||
uart4: serial@4806e000 {
|
||||
compatible = "ti,omap4-uart";
|
||||
reg = <0x4806e000 0x100>;
|
||||
interrupts = <0 70 0x4>;
|
||||
ti,hwmods = "uart4";
|
||||
clock-frequency = <48000000>;
|
||||
};
|
||||
|
||||
uart5: serial@48066000 {
|
||||
compatible = "ti,omap5-uart";
|
||||
compatible = "ti,omap4-uart";
|
||||
reg = <0x48066000 0x100>;
|
||||
interrupts = <0 105 0x4>;
|
||||
ti,hwmods = "uart5";
|
||||
clock-frequency = <48000000>;
|
||||
};
|
||||
|
||||
uart6: serial@48068000 {
|
||||
compatible = "ti,omap6-uart";
|
||||
compatible = "ti,omap4-uart";
|
||||
reg = <0x48068000 0x100>;
|
||||
interrupts = <0 106 0x4>;
|
||||
ti,hwmods = "uart6";
|
||||
clock-frequency = <48000000>;
|
||||
};
|
||||
|
||||
mmc1: mmc@4809c000 {
|
||||
compatible = "ti,omap4-hsmmc";
|
||||
reg = <0x4809c000 0x400>;
|
||||
interrupts = <0 83 0x4>;
|
||||
ti,hwmods = "mmc1";
|
||||
ti,dual-volt;
|
||||
ti,needs-special-reset;
|
||||
@ -254,24 +300,32 @@ mmc1: mmc@4809c000 {
|
||||
|
||||
mmc2: mmc@480b4000 {
|
||||
compatible = "ti,omap4-hsmmc";
|
||||
reg = <0x480b4000 0x400>;
|
||||
interrupts = <0 86 0x4>;
|
||||
ti,hwmods = "mmc2";
|
||||
ti,needs-special-reset;
|
||||
};
|
||||
|
||||
mmc3: mmc@480ad000 {
|
||||
compatible = "ti,omap4-hsmmc";
|
||||
reg = <0x480ad000 0x400>;
|
||||
interrupts = <0 94 0x4>;
|
||||
ti,hwmods = "mmc3";
|
||||
ti,needs-special-reset;
|
||||
};
|
||||
|
||||
mmc4: mmc@480d1000 {
|
||||
compatible = "ti,omap4-hsmmc";
|
||||
reg = <0x480d1000 0x400>;
|
||||
interrupts = <0 96 0x4>;
|
||||
ti,hwmods = "mmc4";
|
||||
ti,needs-special-reset;
|
||||
};
|
||||
|
||||
mmc5: mmc@480d5000 {
|
||||
compatible = "ti,omap4-hsmmc";
|
||||
reg = <0x480d5000 0x400>;
|
||||
interrupts = <0 59 0x4>;
|
||||
ti,hwmods = "mmc5";
|
||||
ti,needs-special-reset;
|
||||
};
|
||||
@ -287,7 +341,6 @@ mcpdm: mcpdm@40132000 {
|
||||
<0x49032000 0x7f>; /* L3 Interconnect */
|
||||
reg-names = "mpu", "dma";
|
||||
interrupts = <0 112 0x4>;
|
||||
interrupt-parent = <&gic>;
|
||||
ti,hwmods = "mcpdm";
|
||||
};
|
||||
|
||||
@ -297,7 +350,6 @@ dmic: dmic@4012e000 {
|
||||
<0x4902e000 0x7f>; /* L3 Interconnect */
|
||||
reg-names = "mpu", "dma";
|
||||
interrupts = <0 114 0x4>;
|
||||
interrupt-parent = <&gic>;
|
||||
ti,hwmods = "dmic";
|
||||
};
|
||||
|
||||
@ -308,7 +360,6 @@ mcbsp1: mcbsp@40122000 {
|
||||
reg-names = "mpu", "dma";
|
||||
interrupts = <0 17 0x4>;
|
||||
interrupt-names = "common";
|
||||
interrupt-parent = <&gic>;
|
||||
ti,buffer-size = <128>;
|
||||
ti,hwmods = "mcbsp1";
|
||||
};
|
||||
@ -320,7 +371,6 @@ mcbsp2: mcbsp@40124000 {
|
||||
reg-names = "mpu", "dma";
|
||||
interrupts = <0 22 0x4>;
|
||||
interrupt-names = "common";
|
||||
interrupt-parent = <&gic>;
|
||||
ti,buffer-size = <128>;
|
||||
ti,hwmods = "mcbsp2";
|
||||
};
|
||||
@ -332,9 +382,97 @@ mcbsp3: mcbsp@40126000 {
|
||||
reg-names = "mpu", "dma";
|
||||
interrupts = <0 23 0x4>;
|
||||
interrupt-names = "common";
|
||||
interrupt-parent = <&gic>;
|
||||
ti,buffer-size = <128>;
|
||||
ti,hwmods = "mcbsp3";
|
||||
};
|
||||
|
||||
timer1: timer@4ae18000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4ae18000 0x80>;
|
||||
interrupts = <0 37 0x4>;
|
||||
ti,hwmods = "timer1";
|
||||
ti,timer-alwon;
|
||||
};
|
||||
|
||||
timer2: timer@48032000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48032000 0x80>;
|
||||
interrupts = <0 38 0x4>;
|
||||
ti,hwmods = "timer2";
|
||||
};
|
||||
|
||||
timer3: timer@48034000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48034000 0x80>;
|
||||
interrupts = <0 39 0x4>;
|
||||
ti,hwmods = "timer3";
|
||||
};
|
||||
|
||||
timer4: timer@48036000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48036000 0x80>;
|
||||
interrupts = <0 40 0x4>;
|
||||
ti,hwmods = "timer4";
|
||||
};
|
||||
|
||||
timer5: timer@40138000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x40138000 0x80>,
|
||||
<0x49038000 0x80>;
|
||||
interrupts = <0 41 0x4>;
|
||||
ti,hwmods = "timer5";
|
||||
ti,timer-dsp;
|
||||
};
|
||||
|
||||
timer6: timer@4013a000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4013a000 0x80>,
|
||||
<0x4903a000 0x80>;
|
||||
interrupts = <0 42 0x4>;
|
||||
ti,hwmods = "timer6";
|
||||
ti,timer-dsp;
|
||||
ti,timer-pwm;
|
||||
};
|
||||
|
||||
timer7: timer@4013c000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4013c000 0x80>,
|
||||
<0x4903c000 0x80>;
|
||||
interrupts = <0 43 0x4>;
|
||||
ti,hwmods = "timer7";
|
||||
ti,timer-dsp;
|
||||
};
|
||||
|
||||
timer8: timer@4013e000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4013e000 0x80>,
|
||||
<0x4903e000 0x80>;
|
||||
interrupts = <0 44 0x4>;
|
||||
ti,hwmods = "timer8";
|
||||
ti,timer-dsp;
|
||||
ti,timer-pwm;
|
||||
};
|
||||
|
||||
timer9: timer@4803e000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4803e000 0x80>;
|
||||
interrupts = <0 45 0x4>;
|
||||
ti,hwmods = "timer9";
|
||||
};
|
||||
|
||||
timer10: timer@48086000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48086000 0x80>;
|
||||
interrupts = <0 46 0x4>;
|
||||
ti,hwmods = "timer10";
|
||||
};
|
||||
|
||||
timer11: timer@48088000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48088000 0x80>;
|
||||
interrupts = <0 47 0x4>;
|
||||
ti,hwmods = "timer11";
|
||||
ti,timer-pwm;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -37,6 +37,24 @@ vmmc1: regulator-vmmc1 {
|
||||
regulator-max-microvolt = <3150000>;
|
||||
};
|
||||
|
||||
vusb1v5: regulator-vusb1v5 {
|
||||
compatible = "ti,twl4030-vusb1v5";
|
||||
};
|
||||
|
||||
vusb1v8: regulator-vusb1v8 {
|
||||
compatible = "ti,twl4030-vusb1v8";
|
||||
};
|
||||
|
||||
vusb3v1: regulator-vusb3v1 {
|
||||
compatible = "ti,twl4030-vusb3v1";
|
||||
};
|
||||
|
||||
vsim: regulator-vsim {
|
||||
compatible = "ti,twl4030-vsim";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
};
|
||||
|
||||
twl_gpio: gpio {
|
||||
compatible = "ti,twl4030-gpio";
|
||||
gpio-controller;
|
||||
@ -44,4 +62,13 @@ twl_gpio: gpio {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
|
||||
twl4030-usb {
|
||||
compatible = "ti,twl4030-usb";
|
||||
interrupts = <10>, <4>;
|
||||
usb1v5-supply = <&vusb1v5>;
|
||||
usb1v8-supply = <&vusb1v8>;
|
||||
usb3v1-supply = <&vusb3v1>;
|
||||
usb_mode = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
@ -86,4 +86,9 @@ v2v1: regulator-v2v1 {
|
||||
clk32kg: regulator-clk32kg {
|
||||
compatible = "ti,twl6030-clk32kg";
|
||||
};
|
||||
|
||||
twl_usb_comparator: usb-comparator {
|
||||
compatible = "ti,twl6030-usb";
|
||||
interrupts = <4>, <10>;
|
||||
};
|
||||
};
|
||||
|
||||
Loading…
Reference in New Issue
Block a user