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sh/PCI: Pass GAPSPCI_DMA_BASE CPU & bus address to dma_declare_coherent_memory()
dma_declare_coherent_memory() needs both the CPU physical address and the bus address of the device memory. They are the same on this platform, but in general we should use pcibios_resource_to_bus() to account for any address translation done by the PCI host bridge. This makes no difference on Dreamcast, but is safer if the usage is copied to future drivers. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Arnd Bergmann <arnd@arndb.de> CC: Magnus Damm <damm@opensource.se> CC: linux-sh@vger.kernel.org
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@ -31,6 +31,8 @@
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static void gapspci_fixup_resources(struct pci_dev *dev)
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static void gapspci_fixup_resources(struct pci_dev *dev)
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{
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{
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struct pci_channel *p = dev->sysdata;
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struct pci_channel *p = dev->sysdata;
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struct resource res;
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struct pci_bus_region region;
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printk(KERN_NOTICE "PCI: Fixing up device %s\n", pci_name(dev));
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printk(KERN_NOTICE "PCI: Fixing up device %s\n", pci_name(dev));
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@ -50,11 +52,21 @@ static void gapspci_fixup_resources(struct pci_dev *dev)
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/*
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/*
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* Redirect dma memory allocations to special memory window.
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* Redirect dma memory allocations to special memory window.
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*
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* If this GAPSPCI region were mapped by a BAR, the CPU
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* phys_addr_t would be pci_resource_start(), and the bus
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* address would be pci_bus_address(pci_resource_start()).
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* But apparently there's no BAR mapping it, so we just
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* "know" its CPU address is GAPSPCI_DMA_BASE.
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*/
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*/
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res.start = GAPSPCI_DMA_BASE;
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res.end = GAPSPCI_DMA_BASE + GAPSPCI_DMA_SIZE - 1;
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res.flags = IORESOURCE_MEM;
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pcibios_resource_to_bus(dev->bus, ®ion, &res);
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BUG_ON(!dma_declare_coherent_memory(&dev->dev,
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BUG_ON(!dma_declare_coherent_memory(&dev->dev,
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GAPSPCI_DMA_BASE,
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res.start,
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GAPSPCI_DMA_BASE,
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region.start,
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GAPSPCI_DMA_SIZE,
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resource_size(&res),
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DMA_MEMORY_MAP |
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DMA_MEMORY_MAP |
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DMA_MEMORY_EXCLUSIVE));
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DMA_MEMORY_EXCLUSIVE));
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break;
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break;
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