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drm/amdgpu:bypass avfs event manager for sriov
This patch is used for virtualization support. In virtualization case, the initialization sequences are not totally the same as non-Virtualization's. The avfs event manager should be bypassed if in SRIOV virtualization case. At the same, this patch will also bypass starting SMC within SRIOV in FIJI, so the SMU firmware loading will be avoid, which is required in SRIOV. Signed-off-by: Frank Min <Frank.Min@amd.com> Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Trigger Huang <trigger.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -396,7 +396,8 @@ static int fiji_start_smu(struct pp_smumgr *smumgr)
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struct fiji_smumgr *priv = (struct fiji_smumgr *)(smumgr->backend);
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struct fiji_smumgr *priv = (struct fiji_smumgr *)(smumgr->backend);
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/* Only start SMC if SMC RAM is not running */
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/* Only start SMC if SMC RAM is not running */
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if (!smu7_is_smc_ram_running(smumgr)) {
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if (!(smu7_is_smc_ram_running(smumgr)
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|| cgs_is_virtualization_enabled(smumgr->device))) {
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fiji_avfs_event_mgr(smumgr, false);
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fiji_avfs_event_mgr(smumgr, false);
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/* Check if SMU is running in protected mode */
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/* Check if SMU is running in protected mode */
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@ -443,6 +444,9 @@ static bool fiji_is_hw_avfs_present(struct pp_smumgr *smumgr)
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uint32_t efuse = 0;
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uint32_t efuse = 0;
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uint32_t mask = (1 << ((AVFS_EN_MSB - AVFS_EN_LSB) + 1)) - 1;
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uint32_t mask = (1 << ((AVFS_EN_MSB - AVFS_EN_LSB) + 1)) - 1;
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if (cgs_is_virtualization_enabled(smumgr->device))
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return 0;
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if (!atomctrl_read_efuse(smumgr->device, AVFS_EN_LSB, AVFS_EN_MSB,
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if (!atomctrl_read_efuse(smumgr->device, AVFS_EN_LSB, AVFS_EN_MSB,
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mask, &efuse)) {
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mask, &efuse)) {
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if (efuse)
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if (efuse)
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