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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-11 19:06:46 +07:00
b43: LCN-PHY: implement SPUR avoidance mode
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -42,6 +42,39 @@ struct lcn_tx_iir_filter {
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u16 values[16];
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};
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/* In theory it's PHY common function, move if needed */
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/* brcms_b_switch_macfreq */
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static void b43_phy_switch_macfreq(struct b43_wldev *dev, u8 spurmode)
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{
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if (dev->dev->chip_id == 43224 || dev->dev->chip_id == 43225) {
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switch (spurmode) {
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case 2: /* 126 Mhz */
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b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x2082);
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b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x8);
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break;
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case 1: /* 123 Mhz */
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b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x5341);
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b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x8);
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break;
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default: /* 120 Mhz */
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b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x8889);
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b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x8);
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break;
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}
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} else if (dev->phy.type == B43_PHYTYPE_LCN) {
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switch (spurmode) {
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case 1: /* 82 Mhz */
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b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x7CE0);
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b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0xC);
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break;
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default: /* 80 Mhz */
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b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0xCCCD);
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b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0xC);
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break;
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}
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}
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}
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/**************************************************
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* Radio 2064.
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**************************************************/
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@ -367,6 +400,27 @@ static bool b43_phy_lcn_load_tx_iir_ofdm_filter(struct b43_wldev *dev,
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return false;
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}
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/* wlc_lcnphy_txrx_spur_avoidance_mode */
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static void b43_phy_lcn_txrx_spur_avoidance_mode(struct b43_wldev *dev,
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bool enable)
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{
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if (enable) {
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b43_phy_write(dev, 0x942, 0x7);
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b43_phy_write(dev, 0x93b, ((1 << 13) + 23));
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b43_phy_write(dev, 0x93c, ((1 << 13) + 1989));
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b43_phy_write(dev, 0x44a, 0x084);
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b43_phy_write(dev, 0x44a, 0x080);
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b43_phy_write(dev, 0x6d3, 0x2222);
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b43_phy_write(dev, 0x6d3, 0x2220);
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} else {
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b43_phy_write(dev, 0x942, 0x0);
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b43_phy_write(dev, 0x93b, ((0 << 13) + 23));
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b43_phy_write(dev, 0x93c, ((0 << 13) + 1989));
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}
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b43_phy_switch_macfreq(dev, enable);
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}
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/**************************************************
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* Channel switching ops.
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**************************************************/
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@ -388,7 +442,7 @@ static void b43_phy_lcn_set_channel_tweaks(struct b43_wldev *dev, int channel)
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b43_phy_write(dev, 0x942, 0);
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/* b43_phy_lcn_txrx_spur_avoidance_mode(dev, false); */
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b43_phy_lcn_txrx_spur_avoidance_mode(dev, false);
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b43_phy_maskset(dev, 0x424, (u16) ~0xff00, 0x1b00);
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b43_phy_write(dev, 0x425, 0x5907);
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} else {
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@ -400,7 +454,7 @@ static void b43_phy_lcn_set_channel_tweaks(struct b43_wldev *dev, int channel)
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b43_phy_write(dev, 0x942, 0);
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/* b43_phy_lcn_txrx_spur_avoidance_mode(dev, true); */
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b43_phy_lcn_txrx_spur_avoidance_mode(dev, true);
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b43_phy_maskset(dev, 0x424, (u16) ~0xff00, 0x1f00);
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b43_phy_write(dev, 0x425, 0x590a);
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}
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