mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2025-01-24 01:29:49 +07:00
mt76: mt7615: initialize dbdc settings on interface add
Use the first two WMM slots for the primary phy and the second two for the secondary phy. Signed-off-by: Felix Fietkau <nbd@nbd.name>
This commit is contained in:
parent
27ae721932
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ac3ef85ceb
@ -121,7 +121,11 @@ static int mt7615_add_interface(struct ieee80211_hw *hw,
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mvif->omac_idx = idx;
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mvif->omac_idx = idx;
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mvif->band_idx = ext_phy;
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mvif->band_idx = ext_phy;
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mvif->wmm_idx = mvif->idx % MT7615_MAX_WMM_SETS;
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if (mt7615_ext_phy(dev))
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mvif->wmm_idx = ext_phy * (MT7615_MAX_WMM_SETS / 2) +
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mvif->idx % (MT7615_MAX_WMM_SETS / 2);
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else
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mvif->wmm_idx = mvif->idx % MT7615_MAX_WMM_SETS;
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ret = mt7615_mcu_set_dev_info(dev, vif, 1);
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ret = mt7615_mcu_set_dev_info(dev, vif, 1);
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if (ret)
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if (ret)
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@ -129,6 +133,10 @@ static int mt7615_add_interface(struct ieee80211_hw *hw,
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dev->vif_mask |= BIT(mvif->idx);
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dev->vif_mask |= BIT(mvif->idx);
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dev->omac_mask |= BIT(mvif->omac_idx);
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dev->omac_mask |= BIT(mvif->omac_idx);
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phy->omac_mask |= BIT(mvif->omac_idx);
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mt7615_mcu_set_dbdc(dev);
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idx = MT7615_WTBL_RESERVED - mvif->idx;
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idx = MT7615_WTBL_RESERVED - mvif->idx;
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INIT_LIST_HEAD(&mvif->sta.poll_list);
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INIT_LIST_HEAD(&mvif->sta.poll_list);
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@ -155,6 +163,7 @@ static void mt7615_remove_interface(struct ieee80211_hw *hw,
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struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv;
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struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv;
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struct mt7615_sta *msta = &mvif->sta;
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struct mt7615_sta *msta = &mvif->sta;
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struct mt7615_dev *dev = mt7615_hw_dev(hw);
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struct mt7615_dev *dev = mt7615_hw_dev(hw);
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struct mt7615_phy *phy = mt7615_hw_phy(hw);
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int idx = msta->wcid.idx;
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int idx = msta->wcid.idx;
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/* TODO: disable beacon for the bss */
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/* TODO: disable beacon for the bss */
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@ -167,6 +176,7 @@ static void mt7615_remove_interface(struct ieee80211_hw *hw,
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mutex_lock(&dev->mt76.mutex);
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mutex_lock(&dev->mt76.mutex);
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dev->vif_mask &= ~BIT(mvif->idx);
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dev->vif_mask &= ~BIT(mvif->idx);
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dev->omac_mask &= ~BIT(mvif->omac_idx);
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dev->omac_mask &= ~BIT(mvif->omac_idx);
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phy->omac_mask &= ~BIT(mvif->omac_idx);
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mutex_unlock(&dev->mt76.mutex);
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mutex_unlock(&dev->mt76.mutex);
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spin_lock_bh(&dev->sta_poll_lock);
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spin_lock_bh(&dev->sta_poll_lock);
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@ -717,6 +717,65 @@ int mt7615_mcu_ctrl_pm_state(struct mt7615_dev *dev, int band, int enter)
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&req, sizeof(req), true);
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&req, sizeof(req), true);
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}
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}
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int mt7615_mcu_set_dbdc(struct mt7615_dev *dev)
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{
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struct mt7615_phy *ext_phy = mt7615_ext_phy(dev);
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struct dbdc_entry {
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u8 type;
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u8 index;
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u8 band;
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u8 _rsv;
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};
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struct {
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u8 enable;
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u8 num;
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u8 _rsv[2];
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struct dbdc_entry entry[64];
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} req = {
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.enable = !!ext_phy,
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};
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int i;
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if (!ext_phy)
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goto out;
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#define ADD_DBDC_ENTRY(_type, _idx, _band) \
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do { \
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req.entry[req.num].type = _type; \
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req.entry[req.num].index = _idx; \
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req.entry[req.num++].band = _band; \
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} while (0)
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for (i = 0; i < 4; i++) {
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bool band = !!(ext_phy->omac_mask & BIT(i));
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ADD_DBDC_ENTRY(DBDC_TYPE_BSS, i, band);
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}
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for (i = 0; i < 14; i++) {
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bool band = !!(ext_phy->omac_mask & BIT(0x11 + i));
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ADD_DBDC_ENTRY(DBDC_TYPE_MBSS, i, band);
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}
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ADD_DBDC_ENTRY(DBDC_TYPE_MU, 0, 1);
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for (i = 0; i < 3; i++)
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ADD_DBDC_ENTRY(DBDC_TYPE_BF, i, 1);
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ADD_DBDC_ENTRY(DBDC_TYPE_WMM, 0, 0);
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ADD_DBDC_ENTRY(DBDC_TYPE_WMM, 1, 0);
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ADD_DBDC_ENTRY(DBDC_TYPE_WMM, 2, 1);
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ADD_DBDC_ENTRY(DBDC_TYPE_WMM, 3, 1);
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ADD_DBDC_ENTRY(DBDC_TYPE_MGMT, 0, 0);
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ADD_DBDC_ENTRY(DBDC_TYPE_MGMT, 1, 1);
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out:
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return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_DBDC_CTRL,
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&req, sizeof(req), true);
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}
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int mt7615_mcu_set_dev_info(struct mt7615_dev *dev,
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int mt7615_mcu_set_dev_info(struct mt7615_dev *dev,
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struct ieee80211_vif *vif, bool enable)
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struct ieee80211_vif *vif, bool enable)
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{
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{
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@ -148,6 +148,7 @@ enum {
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MCU_EXT_CMD_WTBL_UPDATE = 0x32,
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MCU_EXT_CMD_WTBL_UPDATE = 0x32,
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MCU_EXT_CMD_SET_RDD_CTRL = 0x3a,
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MCU_EXT_CMD_SET_RDD_CTRL = 0x3a,
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MCU_EXT_CMD_PROTECT_CTRL = 0x3e,
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MCU_EXT_CMD_PROTECT_CTRL = 0x3e,
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MCU_EXT_CMD_DBDC_CTRL = 0x45,
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MCU_EXT_CMD_MAC_INIT_CTRL = 0x46,
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MCU_EXT_CMD_MAC_INIT_CTRL = 0x46,
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MCU_EXT_CMD_BCN_OFFLOAD = 0x49,
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MCU_EXT_CMD_BCN_OFFLOAD = 0x49,
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MCU_EXT_CMD_SET_RX_PATH = 0x4e,
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MCU_EXT_CMD_SET_RX_PATH = 0x4e,
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@ -202,6 +203,18 @@ enum {
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DEV_INFO_MAX_NUM
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DEV_INFO_MAX_NUM
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};
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};
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enum {
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DBDC_TYPE_WMM,
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DBDC_TYPE_MGMT,
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DBDC_TYPE_BSS,
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DBDC_TYPE_MBSS,
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DBDC_TYPE_REPEATER,
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DBDC_TYPE_MU,
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DBDC_TYPE_BF,
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DBDC_TYPE_PTA,
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__DBDC_TYPE_MAX,
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};
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struct bss_info_omac {
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struct bss_info_omac {
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__le16 tag;
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__le16 tag;
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__le16 len;
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__le16 len;
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@ -88,6 +88,7 @@ struct mt7615_phy {
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struct mt7615_dev *dev;
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struct mt7615_dev *dev;
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u32 rxfilter;
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u32 rxfilter;
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u32 omac_mask;
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unsigned long last_cca_adj;
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unsigned long last_cca_adj;
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int false_cca_ofdm, false_cca_cck;
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int false_cca_ofdm, false_cca_cck;
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@ -285,6 +286,7 @@ int mt7615_mac_wtbl_set_key(struct mt7615_dev *dev, struct mt76_wcid *wcid,
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struct ieee80211_key_conf *key,
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struct ieee80211_key_conf *key,
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enum set_key_cmd cmd);
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enum set_key_cmd cmd);
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int mt7615_mcu_set_dbdc(struct mt7615_dev *dev);
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int mt7615_mcu_set_eeprom(struct mt7615_dev *dev);
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int mt7615_mcu_set_eeprom(struct mt7615_dev *dev);
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int mt7615_mcu_init_mac(struct mt7615_dev *dev);
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int mt7615_mcu_init_mac(struct mt7615_dev *dev);
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int mt7615_mcu_set_rts_thresh(struct mt7615_phy *phy, u32 val);
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int mt7615_mcu_set_rts_thresh(struct mt7615_phy *phy, u32 val);
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@ -121,6 +121,15 @@
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#define MT_CFG_CCR_MAC_D1_2X_GC_EN BIT(30)
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#define MT_CFG_CCR_MAC_D1_2X_GC_EN BIT(30)
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#define MT_CFG_CCR_MAC_D0_2X_GC_EN BIT(31)
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#define MT_CFG_CCR_MAC_D0_2X_GC_EN BIT(31)
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#define MT_DBDC_CTRL0 MT_WF_CFG(0x050)
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#define MT_DBDC_CTRL0_OMAC_00_04 GENMASK(4, 0)
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#define MT_DBDC_CTRL0_OMAC_11_1F GENMASK(19, 5)
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#define MT_DBDC_CTRL0_MGMT GENMASK(21, 20)
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#define MT_DBDC_CTRL0_WMM GENMASK(25, 22)
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#define MT_DBDC_CTRL0_DBDC_EN BIT(31)
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#define MT_DBDC_CTRL1 MT_WF_CFG(0x054)
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#define MT_WF_AGG_BASE 0x20a00
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#define MT_WF_AGG_BASE 0x20a00
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#define MT_WF_AGG(ofs) (MT_WF_AGG_BASE + (ofs))
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#define MT_WF_AGG(ofs) (MT_WF_AGG_BASE + (ofs))
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