mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-15 14:46:45 +07:00
drm/i915: Force RC6 restore after system resume and reset
In order for the RC6 autoenable worker to take any action, RC6 first
must be disabled. Upon resume or reset, the sw state may be stale and so
we require a forced restore.
Fixes: b7137e0cf1
("drm/i915: Defer enabling rc6 til after we submit...")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20160824092701.19178-1-chris@chris-wilson.co.uk
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
This commit is contained in:
parent
79cf219a6a
commit
abc80abde5
@ -1560,6 +1560,7 @@ static int i915_drm_resume(struct drm_device *dev)
|
||||
int ret;
|
||||
|
||||
disable_rpm_wakeref_asserts(dev_priv);
|
||||
intel_sanitize_gt_powersave(dev_priv);
|
||||
|
||||
ret = i915_ggtt_enable_hw(dev_priv);
|
||||
if (ret)
|
||||
@ -1809,6 +1810,7 @@ int i915_reset(struct drm_i915_private *dev_priv)
|
||||
* previous concerns that it doesn't respond well to some forms
|
||||
* of re-init after reset.
|
||||
*/
|
||||
intel_sanitize_gt_powersave(dev_priv);
|
||||
intel_autoenable_gt_powersave(dev_priv);
|
||||
|
||||
return 0;
|
||||
|
Loading…
Reference in New Issue
Block a user