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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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net/mlx5: Add explicit bar address field
Add bar_addr field to store bar-0 address to avoid calling pci_resource_start with hard-coded bar-0 as parameter. Also note that different mlx5 device types will have bar_addr on different bars. This patch does not change any functionality. Signed-off-by: Huy Nguyen <huyn@mellanox.com> Signed-off-by: Vu Pham <vuhuong@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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@ -148,7 +148,7 @@ int mlx5_cmd_alloc_memic(struct mlx5_memic *memic, phys_addr_t *addr,
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return ret;
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}
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*addr = pci_resource_start(dev->pdev, 0) +
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*addr = dev->bar_addr +
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MLX5_GET64(alloc_memic_out, out, memic_start_addr);
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return 0;
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@ -167,7 +167,7 @@ int mlx5_cmd_dealloc_memic(struct mlx5_memic *memic, u64 addr, u64 length)
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u64 start_page_idx;
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int err;
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addr -= pci_resource_start(dev->pdev, 0);
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addr -= dev->bar_addr;
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start_page_idx = (addr - hw_start_addr) >> PAGE_SHIFT;
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MLX5_SET(dealloc_memic_in, in, opcode, MLX5_CMD_OP_DEALLOC_MEMIC);
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@ -1984,7 +1984,7 @@ static phys_addr_t uar_index2pfn(struct mlx5_ib_dev *dev,
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fw_uars_per_page = MLX5_CAP_GEN(dev->mdev, uar_4k) ? MLX5_UARS_IN_PAGE : 1;
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return (pci_resource_start(dev->mdev->pdev, 0) >> PAGE_SHIFT) + uar_idx / fw_uars_per_page;
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return (dev->mdev->bar_addr >> PAGE_SHIFT) + uar_idx / fw_uars_per_page;
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}
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static int get_command(unsigned long offset)
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@ -2174,7 +2174,7 @@ static int dm_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
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page_idx + npages)
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return -EINVAL;
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pfn = ((pci_resource_start(dev->mdev->pdev, 0) +
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pfn = ((dev->mdev->bar_addr +
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MLX5_CAP64_DEV_MEM(dev->mdev, memic_bar_start_addr)) >>
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PAGE_SHIFT) +
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page_idx;
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@ -2258,7 +2258,7 @@ struct ib_dm *mlx5_ib_alloc_dm(struct ib_device *ibdev,
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goto err_free;
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start_offset = memic_addr & ~PAGE_MASK;
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page_idx = (memic_addr - pci_resource_start(memic->dev->pdev, 0) -
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page_idx = (memic_addr - memic->dev->bar_addr -
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MLX5_CAP64_DEV_MEM(memic->dev, memic_bar_start_addr)) >>
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PAGE_SHIFT;
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@ -2301,7 +2301,7 @@ int mlx5_ib_dealloc_dm(struct ib_dm *ibdm)
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if (ret)
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return ret;
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page_idx = (dm->dev_addr - pci_resource_start(memic->dev->pdev, 0) -
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page_idx = (dm->dev_addr - memic->dev->bar_addr -
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MLX5_CAP64_DEV_MEM(memic->dev, memic_bar_start_addr)) >>
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PAGE_SHIFT;
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bitmap_clear(to_mucontext(ibdm->uobject->context)->dm_pages,
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@ -1232,8 +1232,7 @@ static struct ib_mr *mlx5_ib_get_memic_mr(struct ib_pd *pd, u64 memic_addr,
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MLX5_SET64(mkc, mkc, len, length);
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MLX5_SET(mkc, mkc, pd, to_mpd(pd)->pdn);
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MLX5_SET(mkc, mkc, qpn, 0xffffff);
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MLX5_SET64(mkc, mkc, start_addr,
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memic_addr - pci_resource_start(dev->mdev->pdev, 0));
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MLX5_SET64(mkc, mkc, start_addr, memic_addr - dev->mdev->bar_addr);
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err = mlx5_core_create_mkey(mdev, &mr->mmkey, in, inlen);
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if (err)
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@ -739,6 +739,7 @@ static int mlx5_pci_init(struct mlx5_core_dev *dev, struct pci_dev *pdev,
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pci_set_drvdata(dev->pdev, dev);
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dev->bar_addr = pci_resource_start(pdev, 0);
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priv->numa_node = dev_to_node(&dev->pdev->dev);
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err = mlx5_pci_enable_device(dev);
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@ -766,7 +767,7 @@ static int mlx5_pci_init(struct mlx5_core_dev *dev, struct pci_dev *pdev,
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pci_enable_atomic_ops_to_root(pdev, PCI_EXP_DEVCAP2_ATOMIC_COMP128))
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mlx5_core_dbg(dev, "Enabling pci atomics failed\n");
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dev->iseg_base = pci_resource_start(dev->pdev, 0);
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dev->iseg_base = dev->bar_addr;
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dev->iseg = ioremap(dev->iseg_base, sizeof(*dev->iseg));
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if (!dev->iseg) {
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err = -ENOMEM;
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@ -79,7 +79,7 @@ static u64 uar2pfn(struct mlx5_core_dev *mdev, u32 index)
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else
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system_page_index = index;
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return (pci_resource_start(mdev->pdev, 0) >> PAGE_SHIFT) + system_page_index;
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return (mdev->bar_addr >> PAGE_SHIFT) + system_page_index;
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}
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static void up_rel_func(struct kref *kref)
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@ -658,6 +658,7 @@ struct mlx5_core_dev {
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u64 sys_image_guid;
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phys_addr_t iseg_base;
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struct mlx5_init_seg __iomem *iseg;
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phys_addr_t bar_addr;
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enum mlx5_device_state state;
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/* sync interface state */
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struct mutex intf_state_mutex;
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