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drm/radeon: write gfx pg bases even when gfx pg is disabled
For consistency. These buffers aren't used when pg is disabled. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -5488,6 +5488,9 @@ static void si_init_pg(struct radeon_device *rdev)
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si_init_ao_cu_mask(rdev);
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if (rdev->pg_flags & RADEON_PG_SUPPORT_GFX_PG) {
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si_init_gfx_cgpg(rdev);
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} else {
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WREG32(RLC_SAVE_AND_RESTORE_BASE, rdev->rlc.save_restore_gpu_addr >> 8);
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WREG32(RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8);
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}
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si_enable_dma_pg(rdev, true);
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si_enable_gfx_cgpg(rdev, true);
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