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clk/samsung updates for 5.2

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Addition of ADC clock definition for Exynos 5410 SoC (Odroid XU).
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Merge tag 'clk-v5.2-samsung' of https://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk into clk-samsung

Pull Samsung clk driver updates from Sylwester Nawrocki:

 - Addition of ADC clock definition for Exynos 5410 SoC (Odroid XU)

* tag 'clk-v5.2-samsung' of https://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk:
  clk: samsung: exynos5410: Add gate clock for ADC
  clk: samsung: dt-bindings: Add ADC clock ID to Exynos5410
  clk: samsung: dt-bindings: Put CLK_UART3 in order
This commit is contained in:
Stephen Boyd 2019-04-19 13:20:58 -07:00
commit aa2a0592ce
2 changed files with 3 additions and 1 deletions
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1
drivers/clk/samsung/clk-exynos5410.c
View File

@ -209,6 +209,7 @@ static const struct samsung_gate_clock exynos5410_gate_clks[] __initconst = {
GATE(CLK_USI1, "usi1", "aclk66", GATE_IP_PERIC, 11, 0, 0),
GATE(CLK_USI2, "usi2", "aclk66", GATE_IP_PERIC, 12, 0, 0),
GATE(CLK_USI3, "usi3", "aclk66", GATE_IP_PERIC, 13, 0, 0),
GATE(CLK_TSADC, "tsadc", "aclk66", GATE_IP_PERIC, 15, 0, 0),
GATE(CLK_PWM, "pwm", "aclk66", GATE_IP_PERIC, 24, 0, 0),
GATE(CLK_SCLK_UART0, "sclk_uart0", "div_uart0",

3
include/dt-bindings/clock/exynos5410.h
View File

@ -36,6 +36,7 @@
#define CLK_UART0 257
#define CLK_UART1 258
#define CLK_UART2 259
#define CLK_UART3 260
#define CLK_I2C0 261
#define CLK_I2C1 262
#define CLK_I2C2 263
@ -44,7 +45,7 @@
#define CLK_USI1 266
#define CLK_USI2 267
#define CLK_USI3 268
#define CLK_UART3 260
#define CLK_TSADC 270
#define CLK_PWM 279
#define CLK_MCT 315
#define CLK_WDT 316