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pinctrl: intel: implement gpio_irq_enable
There is unexpected gpio interrupt after irq_enable. If not implemeted gpio_irq_enable callback, irq_enable calls irq_unmask instead. But if there was interrupt set before the irq_enable, unmask it may trigger the unexpected interrupt. By implementing the gpio_irq_enable callback, do interrupt status ack, the issue has gone. Signed-off-by: Qi Zheng <qi.zheng@intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Qipeng Zha <qipeng.zha@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -665,6 +665,35 @@ static void intel_gpio_irq_ack(struct irq_data *d)
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spin_unlock(&pctrl->lock);
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}
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static void intel_gpio_irq_enable(struct irq_data *d)
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{
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struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
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struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
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const struct intel_community *community;
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unsigned pin = irqd_to_hwirq(d);
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unsigned long flags;
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spin_lock_irqsave(&pctrl->lock, flags);
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community = intel_get_community(pctrl, pin);
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if (community) {
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unsigned padno = pin_to_padno(community, pin);
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unsigned gpp_size = community->gpp_size;
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unsigned gpp_offset = padno % gpp_size;
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unsigned gpp = padno / gpp_size;
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u32 value;
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/* Clear interrupt status first to avoid unexpected interrupt */
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writel(BIT(gpp_offset), community->regs + GPI_IS + gpp * 4);
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value = readl(community->regs + community->ie_offset + gpp * 4);
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value |= BIT(gpp_offset);
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writel(value, community->regs + community->ie_offset + gpp * 4);
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}
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spin_unlock_irqrestore(&pctrl->lock, flags);
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}
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static void intel_gpio_irq_mask_unmask(struct irq_data *d, bool mask)
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{
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struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
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@ -853,6 +882,7 @@ static irqreturn_t intel_gpio_irq(int irq, void *data)
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static struct irq_chip intel_gpio_irqchip = {
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.name = "intel-gpio",
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.irq_enable = intel_gpio_irq_enable,
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.irq_ack = intel_gpio_irq_ack,
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.irq_mask = intel_gpio_irq_mask,
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.irq_unmask = intel_gpio_irq_unmask,
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