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net/mlx5e: Offload TC matching on ip ttl
Enable offloading of TC matching on ip ttl / hop-limit As matching on ttl is supported only by newer HW brands (ConnectX-5), we should do capability check before attempting to offload that. Signed-off-by: Or Gerlitz <ogerlitz@mellanox.com> Reviewed-by: Paul Blakey <paulb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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@ -904,11 +904,16 @@ static int __parse_cls_flower(struct mlx5e_priv *priv,
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MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_dscp, mask->tos >> 2);
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MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, key->tos >> 2);
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if (mask->tos)
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*min_inline = MLX5_INLINE_MODE_IP;
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MLX5_SET(fte_match_set_lyr_2_4, headers_c, ttl_hoplimit, mask->ttl);
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MLX5_SET(fte_match_set_lyr_2_4, headers_v, ttl_hoplimit, key->ttl);
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if (mask->ttl) /* currently not supported */
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if (mask->ttl &&
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!MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev,
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ft_field_support.outer_ipv4_ttl))
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return -EOPNOTSUPP;
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if (mask->tos || mask->ttl)
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*min_inline = MLX5_INLINE_MODE_IP;
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}
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if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_PORTS)) {
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@ -243,7 +243,7 @@ struct mlx5_ifc_flow_table_fields_supported_bits {
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u8 outer_first_prio[0x1];
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u8 outer_first_cfi[0x1];
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u8 outer_first_vid[0x1];
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u8 reserved_at_7[0x1];
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u8 outer_ipv4_ttl[0x1];
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u8 outer_second_prio[0x1];
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u8 outer_second_cfi[0x1];
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u8 outer_second_vid[0x1];
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@ -380,7 +380,8 @@ struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
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u8 tcp_sport[0x10];
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u8 tcp_dport[0x10];
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u8 reserved_at_c0[0x20];
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u8 reserved_at_c0[0x18];
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u8 ttl_hoplimit[0x8];
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u8 udp_sport[0x10];
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u8 udp_dport[0x10];
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