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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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mmc: sdhci-cadence: Update PHY delay configuration
DTS properties are used instead of fixed data because PHY settings can be different for different chips/boards. Signed-off-by: Piotr Sroka <piotrs@cadence.com> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -18,6 +18,7 @@
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#include <linux/module.h>
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#include <linux/mmc/host.h>
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#include <linux/mmc/mmc.h>
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#include <linux/of.h>
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#include "sdhci-pltfm.h"
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@ -55,6 +56,9 @@
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#define SDHCI_CDNS_PHY_DLY_EMMC_LEGACY 0x06
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#define SDHCI_CDNS_PHY_DLY_EMMC_SDR 0x07
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#define SDHCI_CDNS_PHY_DLY_EMMC_DDR 0x08
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#define SDHCI_CDNS_PHY_DLY_SDCLK 0x0b
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#define SDHCI_CDNS_PHY_DLY_HSMMC 0x0c
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#define SDHCI_CDNS_PHY_DLY_STROBE 0x0d
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/*
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* The tuned val register is 6 bit-wide, but not the whole of the range is
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@ -68,6 +72,25 @@ struct sdhci_cdns_priv {
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bool enhanced_strobe;
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};
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struct sdhci_cdns_phy_cfg {
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const char *property;
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u8 addr;
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};
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static const struct sdhci_cdns_phy_cfg sdhci_cdns_phy_cfgs[] = {
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{ "cdns,phy-input-delay-sd-highspeed", SDHCI_CDNS_PHY_DLY_SD_HS, },
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{ "cdns,phy-input-delay-legacy", SDHCI_CDNS_PHY_DLY_SD_DEFAULT, },
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{ "cdns,phy-input-delay-sd-uhs-sdr12", SDHCI_CDNS_PHY_DLY_UHS_SDR12, },
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{ "cdns,phy-input-delay-sd-uhs-sdr25", SDHCI_CDNS_PHY_DLY_UHS_SDR25, },
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{ "cdns,phy-input-delay-sd-uhs-sdr50", SDHCI_CDNS_PHY_DLY_UHS_SDR50, },
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{ "cdns,phy-input-delay-sd-uhs-ddr50", SDHCI_CDNS_PHY_DLY_UHS_DDR50, },
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{ "cdns,phy-input-delay-mmc-highspeed", SDHCI_CDNS_PHY_DLY_EMMC_SDR, },
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{ "cdns,phy-input-delay-mmc-ddr", SDHCI_CDNS_PHY_DLY_EMMC_DDR, },
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{ "cdns,phy-dll-delay-sdclk", SDHCI_CDNS_PHY_DLY_SDCLK, },
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{ "cdns,phy-dll-delay-sdclk-hsmmc", SDHCI_CDNS_PHY_DLY_HSMMC, },
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{ "cdns,phy-dll-delay-strobe", SDHCI_CDNS_PHY_DLY_STROBE, },
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};
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static int sdhci_cdns_write_phy_reg(struct sdhci_cdns_priv *priv,
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u8 addr, u8 data)
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{
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@ -92,13 +115,26 @@ static int sdhci_cdns_write_phy_reg(struct sdhci_cdns_priv *priv,
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return 0;
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}
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static void sdhci_cdns_phy_init(struct sdhci_cdns_priv *priv)
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static int sdhci_cdns_phy_init(struct device_node *np,
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struct sdhci_cdns_priv *priv)
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{
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sdhci_cdns_write_phy_reg(priv, SDHCI_CDNS_PHY_DLY_SD_HS, 4);
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sdhci_cdns_write_phy_reg(priv, SDHCI_CDNS_PHY_DLY_SD_DEFAULT, 4);
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sdhci_cdns_write_phy_reg(priv, SDHCI_CDNS_PHY_DLY_EMMC_LEGACY, 9);
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sdhci_cdns_write_phy_reg(priv, SDHCI_CDNS_PHY_DLY_EMMC_SDR, 2);
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sdhci_cdns_write_phy_reg(priv, SDHCI_CDNS_PHY_DLY_EMMC_DDR, 3);
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u32 val;
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int ret, i;
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for (i = 0; i < ARRAY_SIZE(sdhci_cdns_phy_cfgs); i++) {
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ret = of_property_read_u32(np, sdhci_cdns_phy_cfgs[i].property,
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&val);
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if (ret)
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continue;
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ret = sdhci_cdns_write_phy_reg(priv,
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sdhci_cdns_phy_cfgs[i].addr,
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val);
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if (ret)
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return ret;
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}
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return 0;
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}
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static inline void *sdhci_cdns_priv(struct sdhci_host *host)
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@ -267,6 +303,7 @@ static int sdhci_cdns_probe(struct platform_device *pdev)
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struct sdhci_cdns_priv *priv;
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struct clk *clk;
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int ret;
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struct device *dev = &pdev->dev;
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clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(clk))
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@ -297,7 +334,9 @@ static int sdhci_cdns_probe(struct platform_device *pdev)
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if (ret)
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goto free;
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sdhci_cdns_phy_init(priv);
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ret = sdhci_cdns_phy_init(dev->of_node, priv);
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if (ret)
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goto free;
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ret = sdhci_add_host(host);
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if (ret)
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