mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-15 15:16:43 +07:00
ARM: dts: tq imx7 common board support
This adds TQMa7 and MBa7 board support. TQMa7 can be mounted with either i.MX7 Solo or Dual. All TQMa7 board variants can be mounted in MBa7 carrier board. Signed-off-by: Bruno Thomsen <bruno.thomsen@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Bruno Thomsen
Shawn Guo
parent
87fd3ce28b
commit
a80a1af6ec
561
arch/arm/boot/dts/imx7-mba7.dtsi
Normal file
561
arch/arm/boot/dts/imx7-mba7.dtsi
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@ -0,0 +1,561 @@
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// SPDX-License-Identifier: GPL-2.0 OR X11
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/*
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* Device Tree Include file for TQ Systems MBa7 carrier board.
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*
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* Copyright (C) 2016 TQ Systems GmbH
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* Author: Markus Niebel <Markus.Niebel@tq-group.com>
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* Copyright (C) 2019 Bruno Thomsen <bruno.thomsen@gmail.com>
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*
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* Note: This file does not include nodes for all peripheral devices.
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* As device driver coverage increases additional nodes can be added.
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*/
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/net/ti-dp83867.h>
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/ {
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beeper {
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compatible = "gpio-beeper";
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gpios = <&pca9555 0 GPIO_ACTIVE_HIGH>;
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};
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chosen {
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stdout-path = &uart6;
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};
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gpio_buttons: gpio-keys {
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compatible = "gpio-keys";
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button-0 {
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/* #SWITCH_A */
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label = "S11";
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linux,code = <KEY_1>;
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gpios = <&pca9555 13 GPIO_ACTIVE_LOW>;
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};
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button-1 {
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/* #SWITCH_B */
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label = "S12";
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linux,code = <KEY_2>;
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gpios = <&pca9555 14 GPIO_ACTIVE_LOW>;
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};
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button-2 {
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/* #SWITCH_C */
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label = "S13";
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linux,code = <KEY_3>;
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gpios = <&pca9555 15 GPIO_ACTIVE_LOW>;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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led1 {
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label = "led1";
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gpios = <&pca9555 8 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "default-on";
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};
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led2 {
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label = "led2";
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gpios = <&pca9555 9 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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};
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};
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reg_sd1_vmmc: regulator-sd1-vmmc {
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compatible = "regulator-fixed";
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regulator-name = "VCC3V3_SD1";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_fec1_pwdn: regulator-fec1-pwdn {
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compatible = "regulator-fixed";
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regulator-name = "PWDN_FEC1";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_fec2_pwdn: regulator-fec2-pwdn {
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compatible = "regulator-fixed";
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regulator-name = "PWDN_FEC2";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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gpio = <&gpio2 31 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
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compatible = "regulator-fixed";
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regulator-name = "VBUS_USBOTG1";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
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compatible = "regulator-fixed";
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regulator-name = "VBUS_USBOTG2";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_mpcie_1v5: regulator-mpcie-1v5 {
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compatible = "regulator-fixed";
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regulator-name = "VCC1V5_MPCIE";
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <1500000>;
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gpio = <&pca9555 12 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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regulator-always-on;
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};
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reg_mpcie_3v3: regulator-mpcie-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "VCC3V3_MPCIE";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&pca9555 10 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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regulator-always-on;
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};
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reg_mba_12v0: regulator-mba-12v0 {
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compatible = "regulator-fixed";
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regulator-name = "VCC12V0_MBA7";
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regulator-min-microvolt = <12000000>;
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regulator-max-microvolt = <12000000>;
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gpio = <&pca9555 11 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_lvds_transmitter: regulator-lvds-transmitter {
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compatible = "regulator-fixed";
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regulator-name = "#SHTDN_LVDS";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&pca9555 1 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_vref_1v8: regulator-vref-1v8 {
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compatible = "regulator-fixed";
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regulator-name = "VCC1V8_REF";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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vin-supply = <&sw2_reg>;
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};
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reg_audio_3v3: regulator-audio-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "VCC3V3_AUDIO";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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};
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&adc1 {
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vref-supply = <®_vref_1v8>;
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status = "okay";
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};
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&adc2 {
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vref-supply = <®_vref_1v8>;
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status = "okay";
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};
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&ecspi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi1>;
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num-chipselects = <3>;
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cs-gpios = <&gpio4 0 GPIO_ACTIVE_LOW>, <&gpio4 1 GPIO_ACTIVE_LOW>,
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<&gpio4 2 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&ecspi2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi2>;
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num-chipselects = <1>;
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status = "okay";
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};
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&fec1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet1>;
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phy-mode = "rgmii-id";
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phy-reset-gpios = <&gpio7 15 GPIO_ACTIVE_LOW>;
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phy-reset-duration = <1>;
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phy-reset-delay = <1>;
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phy-supply = <®_fec1_pwdn>;
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phy-handle = <ðphy1_0>;
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fsl,magic-packet;
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy1_0: ethernet-phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0>;
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ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_50_NS>;
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ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_50_NS>;
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ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
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/* LED1: Link/Activity, LED2: Error */
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ti,led-function = <0x0db0>;
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/* Active low, LED1 and LED2 driven by phy */
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ti,led-ctrl = <0x1001>;
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};
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};
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};
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&flexcan1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan1>;
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status = "okay";
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};
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&flexcan2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan2>;
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status = "okay";
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};
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&i2c1 {
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lm75: temperature-sensor@49 {
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compatible = "national,lm75";
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reg = <0x49>;
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};
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};
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&i2c2 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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tlv320aic32x4: audio-codec@18 {
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compatible = "ti,tlv320aic32x4";
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reg = <0x18>;
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clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
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clock-names = "mclk";
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ldoin-supply = <®_audio_3v3>;
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iov-supply = <®_audio_3v3>;
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};
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pca9555: gpio-expander@20 {
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compatible = "nxp,pca9555";
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reg = <0x20>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pca9555>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-parent = <&gpio7>;
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interrupts = <12 IRQ_TYPE_EDGE_FALLING>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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&i2c3 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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status = "okay";
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hog_mba7_1>;
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pinctrl_ecspi1: ecspi1grp {
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fsl,pins = <
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MX7D_PAD_ECSPI1_MISO__ECSPI1_MISO 0x7c
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MX7D_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x74
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MX7D_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x74
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MX7D_PAD_UART1_RX_DATA__GPIO4_IO0 0x74
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MX7D_PAD_UART1_TX_DATA__GPIO4_IO1 0x74
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MX7D_PAD_UART2_RX_DATA__GPIO4_IO2 0x74
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>;
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};
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pinctrl_ecspi2: ecspi2grp {
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fsl,pins = <
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MX7D_PAD_ECSPI2_MISO__ECSPI2_MISO 0x7c
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MX7D_PAD_ECSPI2_MOSI__ECSPI2_MOSI 0x74
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MX7D_PAD_ECSPI2_SCLK__ECSPI2_SCLK 0x74
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MX7D_PAD_ECSPI2_SS0__ECSPI2_SS0 0x74
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>;
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};
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pinctrl_enet1: enet1grp {
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fsl,pins = <
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MX7D_PAD_GPIO1_IO10__ENET1_MDIO 0x02
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MX7D_PAD_GPIO1_IO11__ENET1_MDC 0x00
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MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC 0x71
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MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x71
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MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x71
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MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 0x71
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MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 0x71
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MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x71
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MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC 0x79
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MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x79
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MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x79
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MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 0x79
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MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 0x79
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MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x79
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/* Reset: SION, 100kPU, SRE_FAST, DSE_X1 */
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MX7D_PAD_ENET1_COL__GPIO7_IO15 0x40000070
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/* INT/PWDN: SION, 100kPU, HYS, SRE_FAST, DSE_X1 */
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MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x40000078
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>;
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};
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pinctrl_flexcan1: flexcan1grp {
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fsl,pins = <
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MX7D_PAD_GPIO1_IO12__FLEXCAN1_RX 0x5a
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MX7D_PAD_GPIO1_IO13__FLEXCAN1_TX 0x52
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>;
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};
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pinctrl_flexcan2: flexcan2grp {
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fsl,pins = <
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MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX 0x5a
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MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX 0x52
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>;
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};
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pinctrl_hog_mba7_1: hogmba71grp {
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fsl,pins = <
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/* Limitation: WDOG2_B / WDOG2_RESET not usable */
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MX7D_PAD_ENET1_RX_CLK__GPIO7_IO13 0x4000007c
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MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x40000074
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/* #BOOT_EN */
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MX7D_PAD_UART2_TX_DATA__GPIO4_IO3 0x40000010
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX7D_PAD_I2C2_SCL__I2C2_SCL 0x40000078
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MX7D_PAD_I2C2_SDA__I2C2_SDA 0x40000078
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>;
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};
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pinctrl_i2c3: i2c3grp {
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fsl,pins = <
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MX7D_PAD_I2C3_SCL__I2C3_SCL 0x40000078
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MX7D_PAD_I2C3_SDA__I2C3_SDA 0x40000078
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>;
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};
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pinctrl_pca9555: pca95550grp {
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fsl,pins = <
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MX7D_PAD_ENET1_TX_CLK__GPIO7_IO12 0x78
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>;
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};
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pinctrl_uart3: uart3grp {
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fsl,pins = <
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MX7D_PAD_UART3_RX_DATA__UART3_DCE_RX 0x7e
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MX7D_PAD_UART3_TX_DATA__UART3_DCE_TX 0x76
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MX7D_PAD_UART3_CTS_B__UART3_DCE_CTS 0x76
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MX7D_PAD_UART3_RTS_B__UART3_DCE_RTS 0x7e
|
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>;
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};
|
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pinctrl_uart4: uart4grp {
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fsl,pins = <
|
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MX7D_PAD_SAI2_TX_SYNC__UART4_DCE_RX 0x7e
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MX7D_PAD_SAI2_TX_BCLK__UART4_DCE_TX 0x76
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MX7D_PAD_SAI2_RX_DATA__UART4_DCE_CTS 0x76
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MX7D_PAD_SAI2_TX_DATA__UART4_DCE_RTS 0x7e
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>;
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};
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pinctrl_uart5: uart5grp {
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fsl,pins = <
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MX7D_PAD_I2C4_SCL__UART5_DCE_RX 0x7e
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MX7D_PAD_I2C4_SDA__UART5_DCE_TX 0x76
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>;
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};
|
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pinctrl_uart6: uart6grp {
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fsl,pins = <
|
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MX7D_PAD_EPDC_DATA08__UART6_DCE_RX 0x7d
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MX7D_PAD_EPDC_DATA09__UART6_DCE_TX 0x75
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MX7D_PAD_EPDC_DATA11__UART6_DCE_CTS 0x75
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MX7D_PAD_EPDC_DATA10__UART6_DCE_RTS 0x7d
|
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>;
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};
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pinctrl_uart7: uart7grp {
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fsl,pins = <
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MX7D_PAD_EPDC_DATA12__UART7_DCE_RX 0x7e
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MX7D_PAD_EPDC_DATA13__UART7_DCE_TX 0x76
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MX7D_PAD_EPDC_DATA15__UART7_DCE_CTS 0x76
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/* Limitation: RTS is not connected */
|
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MX7D_PAD_EPDC_DATA14__UART7_DCE_RTS 0x7e
|
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>;
|
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};
|
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pinctrl_usdhc1_gpio: usdhc1grp_gpio {
|
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fsl,pins = <
|
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/* WP */
|
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MX7D_PAD_SD1_WP__GPIO5_IO1 0x7c
|
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/* CD */
|
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MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x7c
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/* VSELECT */
|
||||
MX7D_PAD_GPIO1_IO08__SD1_VSELECT 0x59
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc1: usdhc1grp {
|
||||
fsl,pins = <
|
||||
MX7D_PAD_SD1_CMD__SD1_CMD 0x5e
|
||||
MX7D_PAD_SD1_CLK__SD1_CLK 0x57
|
||||
MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5e
|
||||
MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5e
|
||||
MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5e
|
||||
MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5e
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc1_100mhz: usdhc1grp_100mhz {
|
||||
fsl,pins = <
|
||||
MX7D_PAD_SD1_CMD__SD1_CMD 0x5a
|
||||
MX7D_PAD_SD1_CLK__SD1_CLK 0x57
|
||||
MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5a
|
||||
MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5a
|
||||
MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5a
|
||||
MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5a
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc1_200mhz: usdhc1grp_200mhz {
|
||||
fsl,pins = <
|
||||
MX7D_PAD_SD1_CMD__SD1_CMD 0x5b
|
||||
MX7D_PAD_SD1_CLK__SD1_CLK 0x57
|
||||
MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5b
|
||||
MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5b
|
||||
MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5b
|
||||
MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5b
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&iomuxc_lpsr {
|
||||
pinctrl_pwm1: pwm1grp {
|
||||
fsl,pins = <
|
||||
/* LCD_CONTRAST */
|
||||
MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT 0x50
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usbotg1: usbotg1grp {
|
||||
fsl,pins = <
|
||||
MX7D_PAD_LPSR_GPIO1_IO04__USB_OTG1_OC 0x5c
|
||||
MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x59
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_wdog1: wdog1grp {
|
||||
fsl,pins = <
|
||||
MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x30
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&pwm1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart3>;
|
||||
assigned-clocks = <&clks IMX7D_UART3_ROOT_SRC>;
|
||||
assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart4>;
|
||||
assigned-clocks = <&clks IMX7D_UART4_ROOT_SRC>;
|
||||
assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart5 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart5>;
|
||||
assigned-clocks = <&clks IMX7D_UART5_ROOT_SRC>;
|
||||
assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart6 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart6>;
|
||||
assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>;
|
||||
assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart7 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart7>;
|
||||
assigned-clocks = <&clks IMX7D_UART7_ROOT_SRC>;
|
||||
assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
|
||||
uart-has-rtscts;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbh {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbotg1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usbotg1>;
|
||||
vbus-supply = <®_usb_otg1_vbus>;
|
||||
srp-disable;
|
||||
hnp-disable;
|
||||
adp-disable;
|
||||
dr_mode = "host";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usdhc1 {
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>;
|
||||
pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_usdhc1_gpio>;
|
||||
pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_usdhc1_gpio>;
|
||||
cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
|
||||
vmmc-supply = <®_sd1_vmmc>;
|
||||
bus-width = <4>;
|
||||
no-1-8-v;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wdog1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_wdog1>;
|
||||
};
|
||||
232
arch/arm/boot/dts/imx7-tqma7.dtsi
Normal file
232
arch/arm/boot/dts/imx7-tqma7.dtsi
Normal file
@ -0,0 +1,232 @@
|
||||
// SPDX-License-Identifier: GPL-2.0 OR X11
|
||||
/*
|
||||
* Device Tree Include file for TQ Systems TQMa7x boards with full mounted PCB.
|
||||
*
|
||||
* Copyright (C) 2016 TQ Systems GmbH
|
||||
* Author: Markus Niebel <Markus.Niebel@tq-group.com>
|
||||
* Copyright (C) 2019 Bruno Thomsen <bruno.thomsen@gmail.com>
|
||||
*/
|
||||
|
||||
/ {
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
/* 512 MB - default configuration */
|
||||
reg = <0x80000000 0x20000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
arm-supply = <&sw1a_reg>;
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
clock-frequency = <100000>;
|
||||
status = "okay";
|
||||
|
||||
pfuze3000: pmic@8 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pmic1>;
|
||||
compatible = "fsl,pfuze3000";
|
||||
reg = <0x08>;
|
||||
|
||||
regulators {
|
||||
sw1a_reg: sw1a {
|
||||
regulator-min-microvolt = <700000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-ramp-delay = <6250>;
|
||||
};
|
||||
|
||||
/* use sw1c_reg to align with pfuze100/pfuze200 */
|
||||
sw1c_reg: sw1b {
|
||||
regulator-min-microvolt = <700000>;
|
||||
regulator-max-microvolt = <1475000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-ramp-delay = <6250>;
|
||||
};
|
||||
|
||||
sw2_reg: sw2 {
|
||||
regulator-min-microvolt = <1500000>;
|
||||
regulator-max-microvolt = <1850000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
sw3a_reg: sw3 {
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <1650000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
swbst_reg: swbst {
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5150000>;
|
||||
};
|
||||
|
||||
snvs_reg: vsnvs {
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vref_reg: vrefddr {
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vgen1_reg: vldo1 {
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vgen2_reg: vldo2 {
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <1550000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vgen3_reg: vccsd {
|
||||
regulator-min-microvolt = <2850000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vgen4_reg: v33 {
|
||||
regulator-min-microvolt = <2850000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vgen5_reg: vldo3 {
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vgen6_reg: vldo4 {
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* NXP SE97BTP with temperature sensor + eeprom */
|
||||
se97b: temperature-sensor-eeprom@1e {
|
||||
compatible = "nxp,se97b", "jedec,jc-42.4-temp";
|
||||
reg = <0x1e>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* ST M24C64 */
|
||||
m24c64: eeprom@50 {
|
||||
compatible = "atmel,24c64";
|
||||
reg = <0x50>;
|
||||
pagesize = <32>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
at24c02: eeprom@56 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x56>;
|
||||
pagesize = <16>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ds1339: rtc@68 {
|
||||
compatible = "dallas,ds1339";
|
||||
reg = <0x68>;
|
||||
};
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl_i2c1: i2c1grp {
|
||||
fsl,pins = <
|
||||
MX7D_PAD_I2C1_SDA__I2C1_SDA 0x40000078
|
||||
MX7D_PAD_I2C1_SCL__I2C1_SCL 0x40000078
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pmic1: pmic1grp {
|
||||
fsl,pins = <
|
||||
MX7D_PAD_SD2_RESET_B__GPIO5_IO11 0x4000005C
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3: usdhc3grp {
|
||||
fsl,pins = <
|
||||
MX7D_PAD_SD3_CMD__SD3_CMD 0x59
|
||||
MX7D_PAD_SD3_CLK__SD3_CLK 0x56
|
||||
MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
|
||||
MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
|
||||
MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
|
||||
MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59
|
||||
MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59
|
||||
MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59
|
||||
MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59
|
||||
MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59
|
||||
MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
|
||||
fsl,pins = <
|
||||
MX7D_PAD_SD3_CMD__SD3_CMD 0x5a
|
||||
MX7D_PAD_SD3_CLK__SD3_CLK 0x51
|
||||
MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a
|
||||
MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a
|
||||
MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a
|
||||
MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a
|
||||
MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a
|
||||
MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a
|
||||
MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a
|
||||
MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a
|
||||
MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1a
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
|
||||
fsl,pins = <
|
||||
MX7D_PAD_SD3_CMD__SD3_CMD 0x5b
|
||||
MX7D_PAD_SD3_CLK__SD3_CLK 0x51
|
||||
MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b
|
||||
MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b
|
||||
MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b
|
||||
MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b
|
||||
MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b
|
||||
MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b
|
||||
MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b
|
||||
MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b
|
||||
MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1b
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&sdma {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usdhc3 {
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
|
||||
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
|
||||
assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
|
||||
assigned-clock-rates = <400000000>;
|
||||
bus-width = <8>;
|
||||
non-removable;
|
||||
vmmc-supply = <&vgen4_reg>;
|
||||
vqmmc-supply = <&sw2_reg>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wdog1 {
|
||||
status = "okay";
|
||||
};
|
||||
Loading…
Reference in New Issue
Block a user