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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-25 09:40:53 +07:00
ide: add missing ide_rate_filter() calls to ->speedproc()-s
* Fix icside, cris-ide, au1xxx-ide, amd74xx, via82cxxx and pmac host drivers to use ide_rate_filter(). This results in the following modes (from user requests) being clipped down: - invalid modes (values 0x46-0xFF) [ for all hosts ] - unsupported by a host UDMA modes [ for hosts which support UDMA] - all UDMA modes and MWDMA3-4 modes [ for hosts which don't support UDMA ] - invalid modes (values 0x25-0x39) [ for hosts which don't support UDMA ] * Host driver specific changes in behavior: icside: - no change cris-ide - clip unsupported UDMA3-6 modes down - fix BUG() on trying to set unsupported UDMA3-6 modes au1xxx-ide/pmac - clip unsupported UDMA modes down amd74xx/via82cxxx - clip unsupported UDMA modes down - fix random PIO timings being set for unsupported/invalid modes - fix unsupported/invalid modes being set on the device * While at it remove no longer needed checks from pmac.c driver. Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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@ -255,8 +255,7 @@ static int icside_set_speed(ide_drive_t *drive, u8 xfer_mode)
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/*
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* Limit the transfer speed to MW_DMA_2.
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*/
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if (xfer_mode > XFER_MW_DMA_2)
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xfer_mode = XFER_MW_DMA_2;
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xfer_mode = ide_rate_filter(drive, xfer_mode);
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switch (xfer_mode) {
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case XFER_MW_DMA_2:
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@ -726,6 +726,8 @@ static int speed_cris_ide(ide_drive_t *drive, u8 speed)
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{
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int cyc = 0, dvs = 0, strobe = 0, hold = 0;
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speed = ide_rate_filter(drive, speed);
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if (speed >= XFER_PIO_0 && speed <= XFER_PIO_4) {
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tune_cris_ide(drive, speed - XFER_PIO_0);
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return ide_config_drive_speed(drive, speed);
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@ -180,6 +180,8 @@ static int auide_tune_chipset (ide_drive_t *drive, u8 speed)
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int mem_sttime;
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int mem_stcfg;
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speed = ide_rate_filter(drive, speed);
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mem_sttime = 0;
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mem_stcfg = au_readl(MEM_STCFG2);
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@ -240,6 +240,8 @@ static int amd_set_drive(ide_drive_t *drive, u8 speed)
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struct ide_timing t, p;
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int T, UT;
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speed = ide_rate_filter(drive, speed);
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if (speed != XFER_PIO_SLOW)
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ide_config_drive_speed(drive, speed);
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@ -165,6 +165,8 @@ static int via_set_drive(ide_drive_t *drive, u8 speed)
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struct ide_timing t, p;
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unsigned int T, UT;
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speed = ide_rate_filter(drive, speed);
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if (speed != XFER_PIO_SLOW)
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ide_config_drive_speed(drive, speed);
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@ -928,6 +928,8 @@ pmac_ide_tune_chipset (ide_drive_t *drive, byte speed)
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pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data;
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u32 *timings, *timings2;
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speed = ide_rate_filter(drive, speed);
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if (pmif == NULL)
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return 1;
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@ -937,17 +939,9 @@ pmac_ide_tune_chipset (ide_drive_t *drive, byte speed)
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switch(speed) {
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#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
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case XFER_UDMA_6:
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if (pmif->kind != controller_sh_ata6)
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return 1;
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case XFER_UDMA_5:
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if (pmif->kind != controller_un_ata6 &&
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pmif->kind != controller_k2_ata6 &&
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pmif->kind != controller_sh_ata6)
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return 1;
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case XFER_UDMA_4:
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case XFER_UDMA_3:
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if (drive->hwif->cbl != ATA_CBL_PATA80)
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return 1;
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case XFER_UDMA_2:
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case XFER_UDMA_1:
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case XFER_UDMA_0:
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