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ASoC: da7219: Reset codec gracefully, if still active
Currently the reset code in i2c_probe only resets the AAD part of the device and not the entire codec. This patch updates the driver to resolve this and ensures that if the codec is still active from a previous boot then the audio paths are powered down prior to reset. Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -1925,7 +1925,8 @@ static int da7219_i2c_probe(struct i2c_client *i2c,
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const struct i2c_device_id *id)
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{
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struct da7219_priv *da7219;
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int ret;
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unsigned int system_active, system_status;
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int i, ret;
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da7219 = devm_kzalloc(&i2c->dev, sizeof(struct da7219_priv),
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GFP_KERNEL);
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@ -1941,14 +1942,37 @@ static int da7219_i2c_probe(struct i2c_client *i2c,
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return ret;
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}
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/* Software reset codec. */
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regcache_cache_bypass(da7219->regmap, true);
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/* Disable audio paths if still active from previous start */
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regmap_read(da7219->regmap, DA7219_SYSTEM_ACTIVE, &system_active);
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if (system_active) {
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regmap_write(da7219->regmap, DA7219_GAIN_RAMP_CTRL,
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DA7219_GAIN_RAMP_RATE_NOMINAL);
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regmap_write(da7219->regmap, DA7219_SYSTEM_MODES_INPUT, 0x00);
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regmap_write(da7219->regmap, DA7219_SYSTEM_MODES_OUTPUT, 0x01);
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for (i = 0; i < DA7219_SYS_STAT_CHECK_RETRIES; ++i) {
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regmap_read(da7219->regmap, DA7219_SYSTEM_STATUS,
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&system_status);
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if (!system_status)
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break;
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msleep(DA7219_SYS_STAT_CHECK_DELAY);
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}
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}
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/* Soft reset codec */
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regmap_write_bits(da7219->regmap, DA7219_ACCDET_CONFIG_1,
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DA7219_ACCDET_EN_MASK, 0);
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regmap_write_bits(da7219->regmap, DA7219_CIF_CTRL,
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DA7219_CIF_REG_SOFT_RESET_MASK, 0);
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DA7219_CIF_REG_SOFT_RESET_MASK,
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DA7219_CIF_REG_SOFT_RESET_MASK);
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regmap_write_bits(da7219->regmap, DA7219_SYSTEM_ACTIVE,
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DA7219_SYSTEM_ACTIVE_MASK, 0);
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regcache_cache_bypass(da7219->regmap, false);
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ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_da7219,
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&da7219_dai, 1);
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if (ret < 0) {
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@ -578,6 +578,7 @@
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#define DA7219_GAIN_RAMP_RATE_SHIFT 0
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#define DA7219_GAIN_RAMP_RATE_MASK (0x3 << 0)
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#define DA7219_GAIN_RAMP_RATE_X8 (0x0 << 0)
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#define DA7219_GAIN_RAMP_RATE_NOMINAL (0x1 << 0)
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#define DA7219_GAIN_RAMP_RATE_MAX 4
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/* DA7219_PC_COUNT = 0x94 */
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@ -772,6 +773,10 @@
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/* SRM */
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#define DA7219_SRM_CHECK_RETRIES 8
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/* System Controller */
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#define DA7219_SYS_STAT_CHECK_RETRIES 6
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#define DA7219_SYS_STAT_CHECK_DELAY 50
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enum da7219_clk_src {
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DA7219_CLKSRC_MCLK = 0,
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DA7219_CLKSRC_MCLK_SQR,
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