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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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powerpc/64s/exception: remove the "extra" macro parameter
Rather than pass in the soft-masking and KVM tests via macro that is passed to another macro to expand it, switch to usig gas macros and conditionally expand the soft-masking and KVM tests. The system reset with its idle test is open coded as it is a one-off. No generated code change. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
Nicholas Piggin
Michael Ellerman
parent
8f528359ef
commit
a7c1ca19c2
@ -235,10 +235,10 @@
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* rfid. Save CTR in case we're CONFIG_RELOCATABLE, in which case
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* EXCEPTION_PROLOG_2_VIRT will be using CTR.
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*/
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#define EXCEPTION_RELON_PROLOG(area, label, hsrr, extra, vec) \
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#define EXCEPTION_RELON_PROLOG(area, label, hsrr, kvm, vec) \
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SET_SCRATCH0(r13); /* save r13 */ \
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EXCEPTION_PROLOG_0(area); \
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EXCEPTION_PROLOG_1(area, extra, vec); \
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EXCEPTION_PROLOG_1 hsrr, area, kvm, vec ; \
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EXCEPTION_PROLOG_2_VIRT label, hsrr
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/* Exception register prefixes */
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@ -325,31 +325,58 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
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/*
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* This version of the EXCEPTION_PROLOG_1 will carry
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* addition parameter called "bitmask" to support
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* checking of the interrupt maskable level in the SOFTEN_TEST.
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* checking of the interrupt maskable level.
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* Intended to be used in MASKABLE_EXCPETION_* macros.
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*/
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#define MASKABLE_EXCEPTION_PROLOG_1(area, extra, vec, bitmask) \
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__EXCEPTION_PROLOG_1_PRE(area); \
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extra(vec, bitmask); \
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__EXCEPTION_PROLOG_1_POST(area)
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.macro MASKABLE_EXCEPTION_PROLOG_1 hsrr, area, kvm, vec, bitmask
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__EXCEPTION_PROLOG_1_PRE(\area\())
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.if \kvm
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KVMTEST \hsrr \vec
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.endif
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lbz r10,PACAIRQSOFTMASK(r13)
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andi. r10,r10,\bitmask
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/* This associates vector numbers with bits in paca->irq_happened */
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.if \vec == 0x500 || \vec == 0xea0
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li r10,PACA_IRQ_EE
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.elseif \vec == 0x900
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li r10,PACA_IRQ_DEC
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.elseif \vec == 0xa00 || \vec == 0xe80
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li r10,PACA_IRQ_DBELL
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.elseif \vec == 0xe60
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li r10,PACA_IRQ_HMI
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.elseif \vec == 0xf00
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li r10,PACA_IRQ_PMI
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.else
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.abort "Bad maskable vector"
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.endif
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.if \hsrr
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bne masked_Hinterrupt
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.else
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bne masked_interrupt
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.endif
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__EXCEPTION_PROLOG_1_POST(\area\())
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.endm
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/*
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* This version of the EXCEPTION_PROLOG_1 is intended
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* to be used in STD_EXCEPTION* macros
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*/
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#define _EXCEPTION_PROLOG_1(area, extra, vec) \
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__EXCEPTION_PROLOG_1_PRE(area); \
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extra(vec); \
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__EXCEPTION_PROLOG_1_POST(area)
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.macro EXCEPTION_PROLOG_1 hsrr, area, kvm, vec
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__EXCEPTION_PROLOG_1_PRE(\area\())
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.if \kvm
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KVMTEST \hsrr \vec
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.endif
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__EXCEPTION_PROLOG_1_POST(\area\())
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.endm
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#define EXCEPTION_PROLOG_1(area, extra, vec) \
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_EXCEPTION_PROLOG_1(area, extra, vec)
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#define EXCEPTION_PROLOG(area, label, h, extra, vec) \
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#define EXCEPTION_PROLOG(area, label, hsrr, kvm, vec) \
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SET_SCRATCH0(r13); /* save r13 */ \
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EXCEPTION_PROLOG_0(area); \
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EXCEPTION_PROLOG_1(area, extra, vec); \
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EXCEPTION_PROLOG_2_REAL label, h, 1
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EXCEPTION_PROLOG_1 hsrr, area, kvm, vec ; \
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EXCEPTION_PROLOG_2_REAL label, hsrr, 1
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
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/*
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@ -415,10 +442,10 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
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#endif
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/* Do not enable RI */
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#define EXCEPTION_PROLOG_NORI(area, label, h, extra, vec) \
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#define EXCEPTION_PROLOG_NORI(area, label, hsrr, kvm, vec) \
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EXCEPTION_PROLOG_0(area); \
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EXCEPTION_PROLOG_1(area, extra, vec); \
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EXCEPTION_PROLOG_2_REAL label, h, 0
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EXCEPTION_PROLOG_1 hsrr, area, kvm, vec ; \
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EXCEPTION_PROLOG_2_REAL label, hsrr, 0
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#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
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.macro KVMTEST hsrr, n
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@ -480,8 +507,6 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
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.endm
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#endif
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#define NOTEST(n)
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#define EXCEPTION_PROLOG_COMMON_1() \
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std r9,_CCR(r1); /* save CR in stackframe */ \
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std r11,_NIP(r1); /* save SRR0 in stackframe */ \
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@ -565,7 +590,7 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
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* Exception vectors.
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*/
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#define STD_EXCEPTION(vec, label) \
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EXCEPTION_PROLOG(PACA_EXGEN, label, EXC_STD, KVMTEST_PR, vec);
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EXCEPTION_PROLOG(PACA_EXGEN, label, EXC_STD, 1, vec);
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/* Version of above for when we have to branch out-of-line */
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#define __OOL_EXCEPTION(vec, label, hdlr) \
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@ -574,112 +599,69 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
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b hdlr
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#define STD_EXCEPTION_OOL(vec, label) \
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EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec); \
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EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 1, vec ; \
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EXCEPTION_PROLOG_2_REAL label, EXC_STD, 1
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#define STD_EXCEPTION_HV(loc, vec, label) \
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EXCEPTION_PROLOG(PACA_EXGEN, label, EXC_HV, KVMTEST_HV, vec)
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EXCEPTION_PROLOG(PACA_EXGEN, label, EXC_HV, 1, vec)
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#define STD_EXCEPTION_HV_OOL(vec, label) \
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EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \
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EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, vec ; \
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EXCEPTION_PROLOG_2_REAL label, EXC_HV, 1
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#define STD_RELON_EXCEPTION(loc, vec, label) \
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/* No guest interrupts come through here */ \
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EXCEPTION_RELON_PROLOG(PACA_EXGEN, label, EXC_STD, NOTEST, vec)
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EXCEPTION_RELON_PROLOG(PACA_EXGEN, label, EXC_STD, 0, vec)
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#define STD_RELON_EXCEPTION_OOL(vec, label) \
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EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \
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EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 0, vec ; \
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EXCEPTION_PROLOG_2_VIRT label, EXC_STD
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#define STD_RELON_EXCEPTION_HV(loc, vec, label) \
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EXCEPTION_RELON_PROLOG(PACA_EXGEN, label, EXC_HV, KVMTEST_HV, vec)
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#define STD_RELON_EXCEPTION_HV(loc, vec, label) \
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EXCEPTION_RELON_PROLOG(PACA_EXGEN, label, EXC_HV, 1, vec)
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#define STD_RELON_EXCEPTION_HV_OOL(vec, label) \
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EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \
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EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, vec; \
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EXCEPTION_PROLOG_2_VIRT label, EXC_HV
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.macro SOFTEN_TEST hsrr, vec, bitmask
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lbz r10, PACAIRQSOFTMASK(r13)
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andi. r10, r10, \bitmask
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/* This associates vector numbers with bits in paca->irq_happened */
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.if \vec == 0x500 || \vec == 0xea0
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li r10, PACA_IRQ_EE
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.elseif \vec == 0x900
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li r10, PACA_IRQ_DEC
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.elseif \vec == 0xa00 || \vec == 0xe80
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li r10, PACA_IRQ_DBELL
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.elseif \vec == 0xe60
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li r10, PACA_IRQ_HMI
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.elseif \vec == 0xf00
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li r10, PACA_IRQ_PMI
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.else
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.abort "Bad maskable vector"
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.endif
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.if \hsrr
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bne masked_Hinterrupt
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.else
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bne masked_interrupt
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.endif
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.endm
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#define SOFTEN_TEST_PR(vec, bitmask) \
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KVMTEST EXC_STD, vec ; \
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SOFTEN_TEST EXC_STD, vec, bitmask
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#define SOFTEN_TEST_HV(vec, bitmask) \
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KVMTEST EXC_HV, vec ; \
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SOFTEN_TEST EXC_HV, vec, bitmask
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#define KVMTEST_PR(vec) \
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KVMTEST EXC_STD, vec
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#define KVMTEST_HV(vec) \
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KVMTEST EXC_HV, vec
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#define SOFTEN_NOTEST_PR(vec, bitmask) SOFTEN_TEST EXC_STD, vec, bitmask
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#define SOFTEN_NOTEST_HV(vec, bitmask) SOFTEN_TEST EXC_HV, vec, bitmask
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#define __MASKABLE_EXCEPTION(vec, label, h, extra, bitmask) \
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#define __MASKABLE_EXCEPTION(vec, label, hsrr, kvm, bitmask) \
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SET_SCRATCH0(r13); /* save r13 */ \
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EXCEPTION_PROLOG_0(PACA_EXGEN); \
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MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec, bitmask); \
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EXCEPTION_PROLOG_2_REAL label, h, 1
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MASKABLE_EXCEPTION_PROLOG_1 hsrr, PACA_EXGEN, kvm, vec, bitmask ; \
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EXCEPTION_PROLOG_2_REAL label, hsrr, 1
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#define MASKABLE_EXCEPTION(vec, label, bitmask) \
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__MASKABLE_EXCEPTION(vec, label, EXC_STD, SOFTEN_TEST_PR, bitmask)
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__MASKABLE_EXCEPTION(vec, label, EXC_STD, 1, bitmask)
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#define MASKABLE_EXCEPTION_OOL(vec, label, bitmask) \
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MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_PR, vec, bitmask);\
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MASKABLE_EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 1, vec, bitmask ; \
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EXCEPTION_PROLOG_2_REAL label, EXC_STD, 1
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#define MASKABLE_EXCEPTION_HV(vec, label, bitmask) \
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__MASKABLE_EXCEPTION(vec, label, EXC_HV, SOFTEN_TEST_HV, bitmask)
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__MASKABLE_EXCEPTION(vec, label, EXC_HV, 1, bitmask)
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#define MASKABLE_EXCEPTION_HV_OOL(vec, label, bitmask) \
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MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec, bitmask);\
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MASKABLE_EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, vec, bitmask ; \
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EXCEPTION_PROLOG_2_REAL label, EXC_HV, 1
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#define __MASKABLE_RELON_EXCEPTION(vec, label, h, extra, bitmask) \
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#define __MASKABLE_RELON_EXCEPTION(vec, label, hsrr, kvm, bitmask) \
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SET_SCRATCH0(r13); /* save r13 */ \
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EXCEPTION_PROLOG_0(PACA_EXGEN); \
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MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec, bitmask); \
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EXCEPTION_PROLOG_2_VIRT label, h
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MASKABLE_EXCEPTION_PROLOG_1 hsrr, PACA_EXGEN, kvm, vec, bitmask ; \
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EXCEPTION_PROLOG_2_VIRT label, hsrr
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#define MASKABLE_RELON_EXCEPTION(vec, label, bitmask) \
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__MASKABLE_RELON_EXCEPTION(vec, label, EXC_STD, SOFTEN_NOTEST_PR, bitmask)
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__MASKABLE_RELON_EXCEPTION(vec, label, EXC_STD, 0, bitmask)
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#define MASKABLE_RELON_EXCEPTION_OOL(vec, label, bitmask) \
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MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_NOTEST_PR, vec, bitmask);\
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MASKABLE_EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 0, vec, bitmask ; \
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EXCEPTION_PROLOG_2_REAL label, EXC_STD, 1
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#define MASKABLE_RELON_EXCEPTION_HV(vec, label, bitmask) \
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__MASKABLE_RELON_EXCEPTION(vec, label, EXC_HV, SOFTEN_TEST_HV, bitmask)
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__MASKABLE_RELON_EXCEPTION(vec, label, EXC_HV, 1, bitmask)
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#define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label, bitmask) \
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MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec, bitmask);\
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MASKABLE_EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, vec, bitmask ; \
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EXCEPTION_PROLOG_2_VIRT label, EXC_HV
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/*
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@ -107,6 +107,17 @@ __start_interrupts:
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EXC_VIRT_NONE(0x4000, 0x100)
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EXC_REAL_BEGIN(system_reset, 0x100, 0x100)
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SET_SCRATCH0(r13)
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EXCEPTION_PROLOG_0(PACA_EXNMI)
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/* This is EXCEPTION_PROLOG_1 with the idle feature section added */
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OPT_SAVE_REG_TO_PACA(PACA_EXNMI+EX_PPR, r9, CPU_FTR_HAS_PPR)
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OPT_SAVE_REG_TO_PACA(PACA_EXNMI+EX_CFAR, r10, CPU_FTR_CFAR)
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INTERRUPT_TO_KERNEL
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SAVE_CTR(r10, PACA_EXNMI)
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mfcr r9
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#ifdef CONFIG_PPC_P7_NAP
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/*
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* If running native on arch 2.06 or later, check if we are waking up
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@ -116,30 +127,29 @@ EXC_VIRT_NONE(0x4000, 0x100)
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* but we branch to the 0xc000... address so we can turn on relocation
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* with mtmsr.
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*/
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#define IDLETEST(n) \
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BEGIN_FTR_SECTION ; \
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mfspr r10,SPRN_SRR1 ; \
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rlwinm. r10,r10,47-31,30,31 ; \
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beq- 1f ; \
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cmpwi cr1,r10,2 ; \
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mfspr r3,SPRN_SRR1 ; \
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bltlr cr1 ; /* no state loss, return to idle caller */ \
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BRANCH_TO_C000(r10, system_reset_idle_common) ; \
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1: \
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END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206) ; \
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KVMTEST_PR(n)
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#else
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#define IDLETEST KVMTEST_PR
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BEGIN_FTR_SECTION
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mfspr r10,SPRN_SRR1
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rlwinm. r10,r10,47-31,30,31
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beq- 1f
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cmpwi cr1,r10,2
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mfspr r3,SPRN_SRR1
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bltlr cr1 /* no state loss, return to idle caller */
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BRANCH_TO_C000(r10, system_reset_idle_common)
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1:
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END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
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#endif
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EXC_REAL_BEGIN(system_reset, 0x100, 0x100)
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SET_SCRATCH0(r13)
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KVMTEST EXC_STD 0x100
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std r11,PACA_EXNMI+EX_R11(r13)
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std r12,PACA_EXNMI+EX_R12(r13)
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GET_SCRATCH0(r10)
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std r10,PACA_EXNMI+EX_R13(r13)
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EXCEPTION_PROLOG_2_REAL system_reset_common, EXC_STD, 0
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/*
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* MSR_RI is not enabled, because PACA_EXNMI and nmi stack is
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* being used, so a nested NMI exception would corrupt it.
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*/
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EXCEPTION_PROLOG_NORI(PACA_EXNMI, system_reset_common, EXC_STD,
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IDLETEST, 0x100)
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EXC_REAL_END(system_reset, 0x100, 0x100)
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EXC_VIRT_NONE(0x4100, 0x100)
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@ -246,7 +256,7 @@ TRAMP_REAL_BEGIN(system_reset_fwnmi)
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SET_SCRATCH0(r13) /* save r13 */
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/* See comment at system_reset exception */
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EXCEPTION_PROLOG_NORI(PACA_EXNMI, system_reset_common, EXC_STD,
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NOTEST, 0x100)
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0, 0x100)
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#endif /* CONFIG_PPC_PSERIES */
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@ -265,7 +275,7 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
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EXC_REAL_END(machine_check, 0x200, 0x100)
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EXC_VIRT_NONE(0x4200, 0x100)
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TRAMP_REAL_BEGIN(machine_check_common_early)
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EXCEPTION_PROLOG_1(PACA_EXMC, NOTEST, 0x200)
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EXCEPTION_PROLOG_1 EXC_STD, PACA_EXMC, 0, 0x200
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/*
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* Register contents:
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* R13 = PACA
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@ -350,7 +360,7 @@ BEGIN_FTR_SECTION
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b machine_check_common_early
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END_FTR_SECTION_IFCLR(CPU_FTR_HVMODE)
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machine_check_pSeries_0:
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EXCEPTION_PROLOG_1(PACA_EXMC, KVMTEST_PR, 0x200)
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EXCEPTION_PROLOG_1 EXC_STD, PACA_EXMC, 1, 0x200
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/*
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* MSR_RI is not enabled, because PACA_EXMC is being used, so a
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* nested machine check corrupts it. machine_check_common enables
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@ -588,7 +598,7 @@ EXCEPTION_PROLOG_0(PACA_EXGEN)
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EXC_REAL_END(data_access, 0x300, 0x80)
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TRAMP_REAL_BEGIN(tramp_real_data_access)
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EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, 0x300)
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EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 1, 0x300
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/*
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* DAR/DSISR must be read before setting MSR[RI], because
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* a d-side MCE will clobber those registers so is not
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@ -603,7 +613,7 @@ EXCEPTION_PROLOG_2_REAL data_access_common, EXC_STD, 1
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EXC_VIRT_BEGIN(data_access, 0x4300, 0x80)
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SET_SCRATCH0(r13) /* save r13 */
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EXCEPTION_PROLOG_0(PACA_EXGEN)
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EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0x300)
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EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 0, 0x300
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mfspr r10,SPRN_DAR
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mfspr r11,SPRN_DSISR
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std r10,PACA_EXGEN+EX_DAR(r13)
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@ -642,7 +652,7 @@ EXCEPTION_PROLOG_0(PACA_EXSLB)
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EXC_REAL_END(data_access_slb, 0x380, 0x80)
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TRAMP_REAL_BEGIN(tramp_real_data_access_slb)
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EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x380)
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EXCEPTION_PROLOG_1 EXC_STD, PACA_EXSLB, 1, 0x380
|
||||
mfspr r10,SPRN_DAR
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std r10,PACA_EXSLB+EX_DAR(r13)
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EXCEPTION_PROLOG_2_REAL data_access_slb_common, EXC_STD, 1
|
||||
@ -650,7 +660,7 @@ EXCEPTION_PROLOG_2_REAL data_access_slb_common, EXC_STD, 1
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EXC_VIRT_BEGIN(data_access_slb, 0x4380, 0x80)
|
||||
SET_SCRATCH0(r13) /* save r13 */
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EXCEPTION_PROLOG_0(PACA_EXSLB)
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EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x380)
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||||
EXCEPTION_PROLOG_1 EXC_STD, PACA_EXSLB, 0, 0x380
|
||||
mfspr r10,SPRN_DAR
|
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std r10,PACA_EXSLB+EX_DAR(r13)
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EXCEPTION_PROLOG_2_VIRT data_access_slb_common, EXC_STD
|
||||
@ -705,11 +715,11 @@ ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX)
|
||||
|
||||
|
||||
EXC_REAL_BEGIN(instruction_access_slb, 0x480, 0x80)
|
||||
EXCEPTION_PROLOG(PACA_EXSLB, instruction_access_slb_common, EXC_STD, KVMTEST_PR, 0x480);
|
||||
EXCEPTION_PROLOG(PACA_EXSLB, instruction_access_slb_common, EXC_STD, 1, 0x480);
|
||||
EXC_REAL_END(instruction_access_slb, 0x480, 0x80)
|
||||
|
||||
EXC_VIRT_BEGIN(instruction_access_slb, 0x4480, 0x80)
|
||||
EXCEPTION_RELON_PROLOG(PACA_EXSLB, instruction_access_slb_common, EXC_STD, NOTEST, 0x480);
|
||||
EXCEPTION_RELON_PROLOG(PACA_EXSLB, instruction_access_slb_common, EXC_STD, 0, 0x480);
|
||||
EXC_VIRT_END(instruction_access_slb, 0x4480, 0x80)
|
||||
|
||||
TRAMP_KVM(PACA_EXSLB, 0x480)
|
||||
@ -757,7 +767,7 @@ hardware_interrupt_relon_hv:
|
||||
IRQS_DISABLED)
|
||||
FTR_SECTION_ELSE
|
||||
__MASKABLE_RELON_EXCEPTION(0x500, hardware_interrupt_common,
|
||||
EXC_STD, SOFTEN_TEST_PR, IRQS_DISABLED)
|
||||
EXC_STD, 1, IRQS_DISABLED)
|
||||
ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
|
||||
EXC_VIRT_END(hardware_interrupt, 0x4500, 0x100)
|
||||
|
||||
@ -769,7 +779,7 @@ EXC_COMMON_ASYNC(hardware_interrupt_common, 0x500, do_IRQ)
|
||||
EXC_REAL_BEGIN(alignment, 0x600, 0x100)
|
||||
SET_SCRATCH0(r13) /* save r13 */
|
||||
EXCEPTION_PROLOG_0(PACA_EXGEN)
|
||||
EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, 0x600)
|
||||
EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 1, 0x600
|
||||
mfspr r10,SPRN_DAR
|
||||
mfspr r11,SPRN_DSISR
|
||||
std r10,PACA_EXGEN+EX_DAR(r13)
|
||||
@ -780,7 +790,7 @@ EXC_REAL_END(alignment, 0x600, 0x100)
|
||||
EXC_VIRT_BEGIN(alignment, 0x4600, 0x100)
|
||||
SET_SCRATCH0(r13) /* save r13 */
|
||||
EXCEPTION_PROLOG_0(PACA_EXGEN)
|
||||
EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0x600)
|
||||
EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 0, 0x600
|
||||
mfspr r10,SPRN_DAR
|
||||
mfspr r11,SPRN_DSISR
|
||||
std r10,PACA_EXGEN+EX_DAR(r13)
|
||||
@ -946,7 +956,7 @@ EXC_COMMON(trap_0b_common, 0xb00, unknown_exception)
|
||||
GET_PACA(r13); \
|
||||
std r10,PACA_EXGEN+EX_R10(r13); \
|
||||
INTERRUPT_TO_KERNEL; \
|
||||
KVMTEST_PR(0xc00); /* uses r10, branch to do_kvm_0xc00_system_call */ \
|
||||
KVMTEST EXC_STD 0xc00 ; /* uses r10, branch to do_kvm_0xc00_system_call */ \
|
||||
HMT_MEDIUM; \
|
||||
mfctr r9;
|
||||
|
||||
@ -1109,7 +1119,7 @@ __TRAMP_REAL_OOL_MASKABLE_HV(hmi_exception, 0xe60, IRQS_DISABLED)
|
||||
EXC_VIRT_NONE(0x4e60, 0x20)
|
||||
TRAMP_KVM_HV(PACA_EXGEN, 0xe60)
|
||||
TRAMP_REAL_BEGIN(hmi_exception_early)
|
||||
EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, 0xe60)
|
||||
EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, 0xe60
|
||||
mr r10,r1 /* Save r1 */
|
||||
ld r1,PACAEMERGSP(r13) /* Use emergency stack for realmode */
|
||||
subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */
|
||||
@ -1311,7 +1321,7 @@ EXC_VIRT_NONE(0x5400, 0x100)
|
||||
EXC_REAL_BEGIN(denorm_exception_hv, 0x1500, 0x100)
|
||||
mtspr SPRN_SPRG_HSCRATCH0,r13
|
||||
EXCEPTION_PROLOG_0(PACA_EXGEN)
|
||||
EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0x1500)
|
||||
EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 0, 0x1500
|
||||
|
||||
#ifdef CONFIG_PPC_DENORMALISATION
|
||||
mfspr r10,SPRN_HSRR1
|
||||
@ -1319,7 +1329,7 @@ EXC_REAL_BEGIN(denorm_exception_hv, 0x1500, 0x100)
|
||||
bne+ denorm_assist
|
||||
#endif
|
||||
|
||||
KVMTEST_HV(0x1500)
|
||||
KVMTEST EXC_HV 0x1500
|
||||
EXCEPTION_PROLOG_2_REAL denorm_common, EXC_HV, 1
|
||||
EXC_REAL_END(denorm_exception_hv, 0x1500, 0x100)
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user