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dt-bindings: add binding for USBSS-DRD controller.
This patch aim at documenting USB related dt-bindings for the Cadence USBSS-DRD controller. Signed-off-by: Pawel Laszczak <pawell@cadence.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Documentation/devicetree/bindings/usb/cdns-usb3.txt
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Documentation/devicetree/bindings/usb/cdns-usb3.txt
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Binding for the Cadence USBSS-DRD controller
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Required properties:
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- reg: Physical base address and size of the controller's register areas.
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Controller has 3 different regions:
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- HOST registers area
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- DEVICE registers area
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- OTG/DRD registers area
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- reg-names - register memory area names:
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"xhci" - for HOST registers space
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"dev" - for DEVICE registers space
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"otg" - for OTG/DRD registers space
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- compatible: Should contain: "cdns,usb3"
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- interrupts: Interrupts used by cdns3 controller:
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"host" - interrupt used by XHCI driver.
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"peripheral" - interrupt used by device driver
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"otg" - interrupt used by DRD/OTG part of driver
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Optional properties:
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- maximum-speed : valid arguments are "super-speed", "high-speed" and
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"full-speed"; refer to usb/generic.txt
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- dr_mode: Should be one of "host", "peripheral" or "otg".
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- phys: reference to the USB PHY
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- phy-names: from the *Generic PHY* bindings;
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Supported names are:
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- cdns3,usb2-phy
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- cdns3,usb3-phy
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- cdns,on-chip-buff-size : size of memory intended as internal memory for endpoints
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buffers expressed in KB
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Example:
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usb@f3000000 {
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compatible = "cdns,usb3";
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interrupts = <GIC_USB_IRQ 7 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_USB_IRQ 7 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_USB_IRQ 8 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "host", "peripheral", "otg";
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reg = <0xf3000000 0x10000>, /* memory area for HOST registers */
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<0xf3010000 0x10000>, /* memory area for DEVICE registers */
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<0xf3020000 0x10000>; /* memory area for OTG/DRD registers */
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reg-names = "xhci", "dev", "otg";
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phys = <&usb2_phy>, <&usb3_phy>;
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phy-names = "cdns3,usb2-phy", "cnds3,usb3-phy";
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};
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