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drm/amd/display: remove GRPH_SURFACE_UPDATE_IMMEDIATE_EN field programming

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This is causing asserts for dce 8 and 10 since they do not contain this
field. It is also unnecessary for later DCEs as it is left in it's
default state of 0

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Dmytro Laktyushkin 2017-05-18 17:02:43 -04:00 committed by Alex Deucher
parent 89c872e595
commit a7562ab35e
2 changed files with 1 additions and 8 deletions
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7
drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c
View File

@ -621,15 +621,10 @@ static bool dce_mi_program_surface_flip_and_addr(
{ {
struct dce_mem_input *dce_mi = TO_DCE_MEM_INPUT(mem_input); struct dce_mem_input *dce_mi = TO_DCE_MEM_INPUT(mem_input);
/* TODO: Figure out if two modes are needed:
* non-XDMA Mode: GRPH_SURFACE_UPDATE_IMMEDIATE_EN = 1
* XDMA Mode: GRPH_SURFACE_UPDATE_H_RETRACE_EN = 1
*/
REG_UPDATE(GRPH_UPDATE, GRPH_UPDATE_LOCK, 1); REG_UPDATE(GRPH_UPDATE, GRPH_UPDATE_LOCK, 1);
REG_UPDATE_2( REG_UPDATE(
GRPH_FLIP_CONTROL, GRPH_FLIP_CONTROL,
GRPH_SURFACE_UPDATE_IMMEDIATE_EN, 0,
GRPH_SURFACE_UPDATE_H_RETRACE_EN, flip_immediate ? 1 : 0); GRPH_SURFACE_UPDATE_H_RETRACE_EN, flip_immediate ? 1 : 0);
switch (address->type) { switch (address->type) {

2
drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h
View File

@ -162,7 +162,6 @@ struct dce_mem_input_registers {
SFB(blk, GRPH_FLIP_CONTROL, GRPH_SURFACE_UPDATE_H_RETRACE_EN, mask_sh) SFB(blk, GRPH_FLIP_CONTROL, GRPH_SURFACE_UPDATE_H_RETRACE_EN, mask_sh)
#define MI_DCP_DCE11_MASK_SH_LIST(mask_sh, blk)\ #define MI_DCP_DCE11_MASK_SH_LIST(mask_sh, blk)\
SFB(blk, GRPH_FLIP_CONTROL, GRPH_SURFACE_UPDATE_IMMEDIATE_EN, mask_sh),\
SFB(blk, GRPH_PIPE_OUTSTANDING_REQUEST_LIMIT, GRPH_PIPE_OUTSTANDING_REQUEST_LIMIT, mask_sh) SFB(blk, GRPH_PIPE_OUTSTANDING_REQUEST_LIMIT, GRPH_PIPE_OUTSTANDING_REQUEST_LIMIT, mask_sh)
#define MI_DCP_PTE_MASK_SH_LIST(mask_sh, blk)\ #define MI_DCP_PTE_MASK_SH_LIST(mask_sh, blk)\
@ -278,7 +277,6 @@ struct dce_mem_input_registers {
type GRPH_PRIMARY_SURFACE_ADDRESS_HIGH; \ type GRPH_PRIMARY_SURFACE_ADDRESS_HIGH; \
type GRPH_PRIMARY_SURFACE_ADDRESS; \ type GRPH_PRIMARY_SURFACE_ADDRESS; \
type GRPH_SURFACE_UPDATE_PENDING; \ type GRPH_SURFACE_UPDATE_PENDING; \
type GRPH_SURFACE_UPDATE_IMMEDIATE_EN; \
type GRPH_SURFACE_UPDATE_H_RETRACE_EN; \ type GRPH_SURFACE_UPDATE_H_RETRACE_EN; \
type GRPH_UPDATE_LOCK; \ type GRPH_UPDATE_LOCK; \
type PIXEL_DURATION; \ type PIXEL_DURATION; \