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drm/i915: Remove WaFbcDisableDpfcClockGating on IVB
Production IVB does not need it. I confirmed this with Art. Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -254,12 +254,6 @@ static void ironlake_disable_fbc(struct drm_device *dev)
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dpfc_ctl &= ~DPFC_CTL_EN;
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I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl);
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if (IS_IVYBRIDGE(dev))
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/* WaFbcDisableDpfcClockGating:ivb */
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I915_WRITE(ILK_DSPCLK_GATE_D,
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I915_READ(ILK_DSPCLK_GATE_D) &
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~ILK_DPFCUNIT_CLOCK_GATE_DISABLE);
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if (IS_HASWELL(dev))
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/* WaFbcDisableDpfcClockGating:hsw */
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I915_WRITE(HSW_CLKGATE_DISABLE_PART_1,
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@ -295,10 +289,6 @@ static void gen7_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
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if (IS_IVYBRIDGE(dev)) {
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/* WaFbcAsynchFlipDisableFbcQueue:ivb */
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I915_WRITE(ILK_DISPLAY_CHICKEN1, ILK_FBCQ_DIS);
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/* WaFbcDisableDpfcClockGating:ivb */
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I915_WRITE(ILK_DSPCLK_GATE_D,
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I915_READ(ILK_DSPCLK_GATE_D) |
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ILK_DPFCUNIT_CLOCK_GATE_DISABLE);
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} else {
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/* WaFbcAsynchFlipDisableFbcQueue:hsw */
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I915_WRITE(HSW_PIPE_SLICE_CHICKEN_1(intel_crtc->pipe),
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